NES RGB mod

[Drakon]

Looks like DBE and CLK are flipped when comparing the NES and that FC schematic.  Checked my toaster NES with a multimeter and that schematic is wrong...

*rant whine etc...*

the second nes schematic says copyright 1992 so it's probably for the nes 2 and not the toaster  

and yes the famicom design is much closer to the playchoice.  I'm sure my twin famicom is the same thing as the famicom.

[Salamander]

It's not the Toploader, I checked mine and PPU pin 13 goes to pin 5 on U3 just like it's supposed to.  Best guess...since it's pin 13 and 18 someone just made a typo.  Cap and resistor values up near Q2 are also quite a bit different on the Toploader hardware.  Schematic for this if it exists would be really nice.

[Drakon]

yeah I agree considering the top loader has less jailbars when rgb modded

[Salamander]

Another thing I spotted this morning...

PPU pins 25-28 are handled fairly differently between the PC10, the toaster and the toploader.

-PC10 sends all 4 pins to an LS244 'noninverting buffer line driver/line receiver'
-Toaster sends PPU pin 25 to pin 5 of a 74HCU04P, the same hex inverter used for the audio, exiting on pin 6 then heading with the other 3 to the cartridge connector
-Toploader sends all 4 right to the cartridge connector with neither chip present
        -Ditto the AV Famicom

[Live_Steam_Mad]

Another thing I spotted this morning...

PPU pins 25-28 are handled fairly differently between the PC10, the toaster and the toploader.

-PC10 sends all 4 pins to an LS244 'noninverting buffer line driver/line receiver'
-Toaster sends PPU pin 25 to pin 5 of a 74HCU04P, the same hex inverter used for the audio, exiting on pin 6 then heading with the other 3 to the cartridge connector
-Toploader sends all 4 right to the cartridge connector with neither chip present
       -Ditto the AV Famicom

Just to clarify that 2nd point above ;-

My Toaster NES R4 has pin 25 PPU (PA13) going direct to pin 65 of NES cart slot ("CHR A13" on the NES section of Ben Heck's NES / Famicom cart slot pinout) and to pin 5 of U9 (TC74HCU04P, hex inverter).

Pin 6 of U9 (six inverters) on my NES goes to pin 58 of NES cart slot (CHR A13 inverted, note that there are two CHR A13's on the NES cart slot, one is CHR A13 (pin 65), the second is this one (CHR A13 inverted).

The Famicom also has CHR A13 inverted, on pin 49 of the Famicom cart slot.  In a similar way to the NES, PPU pin 25 (CHR A13) goes direct to pin 12 of U7 (40H368, contains 2 inverters in the Famicom schematic) and gets inverted in U7 onto pin 11 of U7, then goes to pin 49.  So U7 in Famicom  is doing the job that U9 does in the Toaster NES, for CHR A13.

Cheers,

Alistair G.

[Salamander]

CHR A13 inverted

Right you are, I swear my eyes were going to cross from looking at this stuff so long.  I'm out of ideas on this one really and even went so far as to socket the 74HC373 for further experimentation but still couldn't clear those pesky JBs.

[Live_Steam_Mad]

OK so I traced all the connections on the PPU of my Rev. 4 NTSC USA Toaster NES and I got ;-

PPU ;-
pin 1 is R/W_, goes direct to pin 34 of 2A03 CPU and pin 21 of IC U1 (2K x 8 bits SRAM / Work RAM) and pin 14 of NES cart slot
pin 2 is D0, goes direct to pin 32 of Expansion port (CPU D0) and pin 49 of NES cart slot (PRG D0) and pin 3 of IC U7 and pin 3 of IC U8 and pin 28 of 2A03 CPU and pin 9 of IC WRAM (U1)
pin 3 is D1, goes direct to pin 31 of Expansion port (CPU D1) and pin 48 of NES cart slot (PRG D1) and pin 5 of IC U7 and pin 5 of IC U8 and pin 27 of 2A03 CPU and pin 10 of IC WRAM (U1)
pin 4 is D2, goes direct to pin 30 of Expansion port (CPU D2) and pin 47 of NES cart slot (PRG D2) and pin 9 of IC U7 and pin 9 of IC U8 and pin 26 of 2A03 CPU and pin 11 of IC WRAM (U1)
pin 5 is D3, goes direct to pin 29 of Expansion port (CPU D3) and pin 46 of NES cart slot (PRG D3) and pin 11 of IC U7 and pin 11 of IC U8 and pin 25 of 2A03 CPU and pin 13 of IC WRAM (U1)
pin 6 is D4, goes direct to pin 28 of Expansion port (CPU D4) and pin 45 of NES cart slot (PRG D4) and pin 13 of IC U7 and pin 13 of IC U8 and pin 24 of 2A03 CPU and pin 14 of IC WRAM (U1)
pin 7 is D5, goes direct to pin 27 of Expansion port (CPU D5) and pin 44 of NES cart slot (PRG D5) and pin 23 of 2A03 CPU and pin 15 of IC  WRAM (U1)
pin 8 is D6, goes direct to pin 26 of Expansion port (CPU D6) and pin 43 of NES cart slot (PRG D6) and and pin 22 of 2A03 CPU and pin 16 of IC WRAM (U1)
pin 9 is D7, goes direct to pin 25 of Expansion port (CPU D7) and pin 42 of NES cart slot (PRG D7) and pin 21 of 2A03 CPU and pin 17 of IC WRAM (U1)
pin 10 is RS2, goes direct to pin 11 of NES cart slot (PRG A02) and pin 6 of 2A03 CPU and pin 6 of IC WRAM (U1)
pin 11 is RS1, goes direct to pin 12 of NES cart slot (PRG A01) and pin 5 of 2A03 CPU and pin 7 of IC WRAM (U1)
pin 12 is RS0, goes direct to pin 13 of NES cart slot (PRG A00) and pin 4 of 2A03 CPU and pin 8 of IC WRAM (U1)
pin 13 is DBE_, goes direct to pin 5 of U3 (74HC139P, Dual 2-to-4 line decoder/demultiplexer)
pin 14 is RED, goes to my Moosmann amp #1
pin 15 is BLUE, goes to my Moosmann amp #2
pin 16 is GREEN, goes to my Moosmann amp #3
pin 17 is MVGND and goes direct to Ground of NES PCB
pin 18 is CLK (PPUCLK), goes through C45 (51pF cap) and then though 220K ohms (R10) to the Base of Q2 and then through C43 (51pF cap) to ground, etc (i.e. from pin 18 of PPU then through the middle left section of "NES3" on the schematic)
pin 19 is NMI_, goes direct to pin 33 of 2A03 CPU and to pin 4 of Expansion port
pin 20 is Ground, goes direct to Ground on NES PCB
pin 21 is Composite Sync and goes direct to the Base of transistor Q1 (A397), the Collector is Grounded, and the Emitter goes direct to pin 21 of Expansion port. Also there is a direct connection from Emitter of Q1 to R2 (150 Ohms) (on the NES Schematic it is shown as 510 Ohms instead), then through R2 to VCC (pin 36 NES cart slot), and also a direct connection from Emitter of Q1 to FC2 (Ferrite Core/Choke), then through FC2, and then through C5 (330pF) to Ground of NES PCB. From Emitter of Q1 there is a direct connection to pin 1 of the 5 pins that goes into the RF box.
pin 22 is RST_, goes to pin 3 of 2A03 CPU, and pin 9 of U9, and pin 9 of U10
pin 23 is WE_ (CHR RAM WR_), goes direct to pin 56 of NES cart slot, and pin 21 of VRAM (U4). Electronix schematic is wrong (see below)
pin 24 is RD_ (CHR RAM RD_), goes direct to pin 21 NES cart slot, and pin 20 VRAM (U4). I added a 68pF cap from pin 24 PPU to Ground, to be the same as the PC10 (and Famicom!) schematic

pin 25 is PA13, goes direct to pin 65 of NES cart slot ("CHR A13" on the NES section of Ben Heck's NES / Famicom cart slot pinout) and to pin 5 of U9 and to the middle pin of RA2 (Resistor Array 2) then through 5.2K Ohms of RA2 to middle left pin of RA2 then to pin 36 of 2A03 CPU, also from middle pin of RA2 then through 9.7K Ohms of RA2 to far left hand pin of RA2 then to pin 35 of 2A03 CPU, also from middle pin of RA2 then through 7.6K Ohms of RA2 to middle right pin of RA2 then to pin 39 of 2A03 CPU, also from middle pin of RA2 then through 5.4K Ohms of RA2 to far right pin of RA2 then to pin 40 of 2A03 CPU and to VCC (pin 36 of NES cart slot)

pin 26 is PA12 (CHR A12), goes direct to pin 64 of NES cart slot
pin 27 is PA11 (CHR A11), goes direct to pin 62 of NES cart slot
pin 28 is PA10 (CHR A10), goes direct to pin 63 of NES cart slot
pin 29 is PA9 (CHR A09), goes direct to pin 61 of NES cart slot and pin 22 of VRAM (U4)
pin 30 is PA8 (CHR A08), goes direct to pin 60 of NES cart slot and pin 23 of VRAM (U4)

pin 31 is AD7 (CHR D7), goes direct to pin 18 of U2 (Toshiba TC74HC373P, Non-inverting Octal D-type Latch) then out of pin 19 of U2 (O8, output no. then to pin 1 of VRAM (A7) and to CHR A07 i.e. pin 59 of NES cart slot. Also PPU pin 31 goes direct to AD7 and pin 17 of VRAM (U4) and CHR D7 i.e. pin 66 of NES cart slot

pin 32 is AD6 (CHR D6), goes direct to pin 3 of U2 (Toshiba TC74HC373P, Non-inverting Octal D-type Latch) then out of pin 2 of U2 (O1, output no. 1) then to pin 2 of VRAM (A6) and to CHR A06 i.e. pin 23 of NES cart slot. Also PPU pin 32 goes direct to AD6 i.e. pin 16 of VRAM (U4) and CHR D6 i.e. pin 67 of NES cart slot

pin 33 is AD5 (CHR D5), goes direct to pin 17 of U2 (Toshiba TC74HC373P, Non-inverting Octal i.e. Eight D-type Latches) then out of pin 16 of U2 (O7, output no. 7) then to pin 3 of VRAM (A5) and to CHR A05 i.e. pin 24 of NES cart slot. Also PPU pin 33 goes direct to AD5 i.e. pin 15 of VRAM (U4) and CHR D5 i.e. pin 68 of NES cart slot.

pin 34 is AD4 (CHR D4), goes direct to pin 4 of U2 (Toshiba TC74HC373P, Non-inverting Octal i.e. Eight D-type Latches) then 0ut of pin 5 of U2 (O2, output no. 2) then to pin 4 of VRAM (A4) and to CHR A04 i.e. pin 25 of NES cart slot. Also PPU pin 34 goes direct to AD4 i.e. pin 14 of VRAM (U4) and CHR D4 i.e. pin 69 of NES cart slot.

pin 35 is AD3 (CHR D3), goes direct to pin 14 of U2 (Toshiba TC74HC373P, Non-inverting Octal i.e. Eight D-type Latches) then out of pin 15 of U2 (O6, output no. 6) then to pin 5 of VRAM (A3) and to CHR A03 i.e. pin 26 of NES cart slot. Also PPU pin 35 goes direct to AD3 i.e. pin 13 of VRAM (U4) and CHR D3 i.e. pin 33 of NES cart slot.

pin 36 is AD2 (CHR D2), goes direct to pin 7 of U2 (Toshiba TC74HC373P, Non-inverting Octal i.e. Eight D-type Latches) then out of pin 6 of U2 (O3, output no. 3) then to pin 6 of VRAM (A2) and to CHR A02 i.e. pin 27 of NES cart slot. Also PPU pin 36 goes direct to AD2 i.e. pin 11 of VRAM (U4) and CHR D2 i.e. pin 32 of NES cart slot.

pin 37 is AD1 (CHR D1), goes direct to pin 13 of U2 (Toshiba TC74HC373P, Non-inverting Octal i.e Eight D-type Latches) then out of pin 12 of U2 (O5, output no. 5) then to pin 7 of VRAM (A1) and to CHR A01 i.e. pin 28 of NES cart slot. Also PPU pin 37 goes direct to AD1 i.e. pin 10 of VRAM (U4) and CHR D1 i.e. pin 31 of NES cart slot.

pin 38 is AD0 (CHR D0), goes direct to pin 8 of U2 (Toshiba TC74HC373P, Non-inverting Octal i.e. Eight D-type Latches) then out of pin 9 of U2 (O4, output no. 4) then to pin 8 of VRAM (A0) and to CHR A00 i.e. pin 29 of NES cart slot. Also PPU pin 38 goes direct to AD0 i.e. pin 9 of VRAM (U4) and CHR D0 i.e. pin 30 of NES cart slot.

pin 39 is ALE, goes direct to pin 11 of U2
pin 40 is VCC, goes direct to pin 36 of NES cart slot

My CPU is RP2A03E, batch 6K2 B1
IC U1 is a TMM2115BP-15 (2K x 8 bits SRAM 150ns/ Work RAM)
IC U2 is a Toshiba TC74HC373P (Non-inverting Octal D-type Latch with 3-State output, see http://www.datasheetarchive.com/dl/Databooks-4/Book609-949.pdf )
IC U3 is a Toshiba TC74HC139P (Dual 2-to-4 line decoder/demultiplexer)
IC U4 is a TMM2115BP-15 (2K x 8 bits SRAM 150ns/ Video RAM)
IC U7 and U8 are both a Toshiba TC40H368P ("Hex bus drivers with 3-state outputs", or "Buffer Memory Address Registers", also called "Hex Buffers" and "Line Drivers", or "Drive Bus Lines"), the 368 version is the Inverted outputs version. D0 through D4 come out of U7's inverted outputs, and D0 through D4 also come out of U8's inverted outputs
U9 is a Toshiba TC74HCU0P (Hex Inverter)
U10 is the CIC Lockout Chip 3193A, batch 8644 A, copyright 1986 Nintendo, I have cut off pin 4 of this chip from the body of the chip
Q1 is an A937 transistor
Q2 is a C2021 transistor

NOTES:

1) My factory fitted PPU in this NES was RP2C02E-0, batch 6K3 43. I removed this and fitted a socket and added an RP2C03B, came from my PC10 PCB's. I used Moosmann's RGB mod.

2) In the above, a line after the label means INVERTED

3) The first 5 data bus lines i.e. D0 to D4 are all coming out of a TC40H368P hex inverter, but D5 to D7 are not!!!

4) As Salamander mentions, it would appear that either my NES Rev.4 does not follow this NES schematic, or that there is an error in the Electronix NES schematic, because DBE is shown as going through a 51pF cap and then to E of Q3, as well as through 510R to ground, and etc (through the middle left section of "NES3" on the schematic), whereas my NES DOES NOT. My NES follows the Famicom schematics instead, in that DBE (pin 13 of PPU) goes direct to pin 5 of U3, and it is instead PPU pin 18 (CLK) that goes direct to the C45 (51pF cap) and through the rest of the components aforementioned.

5) Also it shows on the Electronix NES schematic that a pin of U3 (not numbered!) connects to pin 18 of PPU (CLK). On my NES pin 18 of PPU (CLK) doesn't connect to ANY pin of my U3!

6) On the Electronix schematic, the C2021 transistor to the right of the 21.47727 Crystal (Q2) has it's Collector going through 510 Ohms to VCC. On my NES, this is instead a 1.2KOhms resistor, R11 (connecting to pin 36 of NES cart slot, i.e. VCC). Also the schematic shows Q3's Emitter going though 510R to ground, but my NES has it going through R12 (1.2KOhms) instead.

7) My NES has the 30pF (the one in parallel with the 18pF cap connected to the X'TAL) as a Variable capacitor (it's got an adjustment that you can do with a small cross point screwdriver), the NES schematic shows this as just a normal 30pF cap, so my NES follows the Famicom schematic in this case.

8 ) On the Electronix schematic, I don't know what the hell they are trying to show on "WR" pin of PPU, but it can't be pin 21 as shown, since 21 is Composite Video. They must mean WR = Write = Write Enable, which instead should be on PPU pin 23 (so it's a typo, should have been "23" and seeing as it's next to pin 24 I assumed they meant it to be in numerical order), should be going to 21 of VRAM (U4) (i.e. should connect two lines lower down!). Instead it's shown going to pin 19 of VRAM (VRAM CHR A10), and this doesn't even connect to the PPU! (note in the above that pin 28 is CHR A10 but is NOT the same as VRAM CHR A10, which goes to pin 22 of NES cart slot).  There should NOT be a connection from pin 19 VRAM to PPU pin 23! Pins 26, 27, 28 of PPU (PA12, PA11, PA10) are not even shown on the PPU pinout!  

9) Expansion port pin 21 is connected to Emitter of Q1 (A397) i.e. VIDEO (since Q1's base connects to pin 21 of PPU i.e. Composite Video, and Audio is on pin 22 of Expansion port, since it connects with very low resistance to pin 2 of the 5 pins where I am taking internal mono audio from for my stereo audio mod. So this is basically the reverse of the pinout on the NESDev Wiki for NES (Expansion port pinout webpage) where they have pin 21 Expansion port as audio and pin 22 as Video, i.e. NESDev has them swapped on that webpage of theirs. I have reported this on the NesDev forums, maybe a moderator will correct it.

10) On the Famicom schematic, it uses 2 resistors (R6 2.2K, R12 220R) instead of just the one (R2, 150R) on my NES, for the Composite Video section, in the part which goes from Emitter of Q1 to VCC. On the Famicom, the Video output is taken from between these two resistors. The "diagonal rectangle" immediately to the right of the 2SA937 transistor in the NES schematic is FC2. From Emitter of Q1 there is a direct connection to pin 1 of the 5 pins that goes into the RF box, and pin 2 is internal mono audio and pin 3 is VCC (none are ground, the RF casing itself is ground).

11) It seems that there is another mistake in the Electronic NES Schematic in that A0, A1, A2 are shown as PPU pins (not numbered!) and are infact instead CHR A12, CHR A11, CHR A10 respectively, PPU pins 26, 28, 27 on NES cart pins 64, 62, 63, and called PA12, PA10, PA11 in the Famicom schematics. AS well as this, if you compare NES and Famicom cart slots, Famicom has pins 53, 54, 55 as CHR A10, CHR A11, CHR A12, whereas NES has them on 62, 63, 64 and they are CHR A11, CHR A10, CHR A12 on the NES as the NES swaps the former 2 pins (CHR A10, CHR A11) around compared to the Famicom cart connector, but this latter part is true and not a mistake in the schematic.

12) PPU Pin 24 RD (CHR RAM RD) goes through 68pF to Ground on Famicom Schematic, just like on the PlayChoice 10. On my NES it didn't, so I added it when I did the NES RGB mod.

13) On the Electronix NES schematic, PPU pin 25 (PA13) is showing as connecting to pin 37 (CHR ROM OUTPUT ENABLE as it is labelled, but labelled as CLOCK on the NES DEV Wiki's 72 pin slot pinout) and going through C44 (220pF cap) to pin 29 of 2A03 CPU, and to the section on the middle left in Electronix NES schematic's "NES 3" section (clock components). This is another mistake as on my NES there is no electrical connection between PPU pin 25 and NES cart slot pin 37. Instead, pin 25 of PPU is connected to pin 65 of NES cart slot (CHR A13). The Famicom schematic shows a connection from PPU pin 25 to pin 12 of U7 (40H368) but on my NES PPU pin 25 does not connect to ANY pin on either U7 or U8 of my NES!

14) Pin 6 of U9 (TC74HCU04P, hex inverter) on my NES goes to pin 58 of NES cart slot (CHR A13 inverted, note that there are two CHR A13's on the NES cart slot, one is CHR A13 (pin 65) (connected to pin 25 of PPU), the second is this one (CHR A13 inverted). The Famicom also has CHR A13 inverted, on pin 49 of the Famicom cart slot.  In a similar way to the NES, PPU pin 25 (CHR A13) goes direct to pin 12 of U7 (40H368, contains 2 inverters in the Famicom schematic) and gets inverted in U7 onto pin 11 of U7, then goes to pin 49.  So U7 in Famicom  is doing the job that U9 does in the Toaster NES, for CHR A13

15) Pin 40 of PPU (VCC) is not shown on the Electronix NES schematic of the PPU!

16) On my RGB NES I am instead using pin 21 of PPU as Composite Sync (same as PC10 of course) instead of Composite Video, but that's the only change from a normal Toaster NES for this PPU pin. I am still routing the Composite Sync through the RF box to amplify it, in exactly the same way that the Toaster NES does with it's Composite Video, I am using exactly the same circuit, then out to Composite Video pin on SCART, as my TV in RGB mode still uses Composite Video  to get it's Sync signal from, as do most TV's apparently.

17) A few times whilst testing I noticed that there was more Ohms (e.g. 15!) than there should have been between a few pins on the 72 pin connector and the PCB, so I pulled it out a little and back in and the connection was then back to being good. Morale of the story, get a toploader !!

18) Two more important links for cross referencing the Famicom and NES schematics by the cart slot connections are ;- http://wiki.nesdev.com/w/index.php/NES_expansion_port_pinout and http://benheck.com/Downloads/NES_Famicom_Pinouts.pdf

Cheers,

Alistair G.

[Salamander]

Desoldered the RF box today to test if the issue is supply voltage, the regulator or possibly internal caps there.  Ran voltage and ground from an external hard drive enclosure but got no change in JBs.

[Live_Steam_Mad]

OK starting to go through the schematics for the NES / Famicom and comparing where they differ to the PC10, and starting with pin 1 of PPU,  PC10 has an IC 3G (Hex Inverter) and NES does not. But this is to be expected and can't be causing the glitching. It is there because there is an LS245 (sitting between CPU and WRAM) acting as a Bus Tranceiver (Bi-directional Eight-Bit Buffer). The DIR (output control pin) of the LS245 is being controlled by the R/W_ signal (Read / Write) which goes through IC 3G (which is inverted, hence the need for the use of one of the six inverters inside IC 3G to drive the DIR signal on IC 3G).

So when I get to pins 2 to 9 (D0 through D7) of the PC10 PPU I see that there is the aforementioned LS245 sitting between PPU and CPU, also this same LS245 is also sitting between CPU and WRAM (however, PPU pins 2 to 9 to WRAM are direct)

The NES does NOT have an LS245, instead on the NES PPU pins 2 to 9 (D0 through D7) go direct to WRAM and also go direct from PPU to CPU, and also go direct from CPU to WRAM. The Famicom is the same.

Apparently the function of the LS245 is normally to interconnect two buses and, depending on the DIR-pin, either transmits data from bus A to B or B to A. In this case, however, there are 3 busses that it is connecting! So I read, "74LS245, like most bus-oriented chips, has tri-state drivers, and in the third, high-impedance state, the driver is effectively disconnected, allowing other drivers to use the bus. If you just connected the busses, you could have only one data source".
      Meaning (I assume) that DIR (which stands for DIRection of data flow I suspect) activates a kind of arbitration and allows either CPU to read / write to / from Work RAM, or PPU to do so, BUT not at the same time? I think this is like with the Commodore Amiga A500 with only ChipRam (VRAM) and no Fast RAM (CPU bus only ram), when the custom chip Agnus arbitrates between letting the either the CPU have access to ChipRAM (program subroutines execute) or the Blitter (BLock Image Transfer chip) gets access to ChipRAM(VRAM) (huge sprite moves around the screen but CPU is held off and can't execute for a while).
 But why does the NES or Famicom not need this LS245 chip and the PC10 does?!  

Is there any chance that this missing buffer chip is causing the glitches when this same PC10 PPU is used in my R4 NES? I suppose I could try wiring up my NES the same as the PC10 in this respect an see what happens (if it's possible?)! This would be my first suggestion so far.

To do this however would mean me having to socket my CPU (using the same precision socket as I used for my PPU) and cut off the ends of CPU socket pins 28 though 21 (D0 through D7) and solder eight wires onto them and put tape over the NES PCB pins and lead the wires out to a Veroboard / Stripboard (same as my Moosmann amp is using) and to pins 2 though 9 on an LS245 mounted there, and also then wire pins 18 through 11 of this same LS245 back from the Veroboard to the solder side (not component side) of the NES PCB to the CPU solder holes on pins 28 though 21.

Also however it is more complex than that, as the input to the WRAM (WE) also has to be inverted (as I think the PC10 schematic is showing?) before it enters on pin 21 of the WRAM (but I don't fully understand how this is achieved as it shows no inverter for this on the PC10 schematic, only a circle next to WE on the WRAM which I assume means this connection needs an inverter), and you have to have an inverter for the DIR input of the LS245 i.e. you are going to need to add a hex inverter (just like in PC10 IC 3G) to the Veroboard as well, and there are also a concatenation of 3 inverters chained together, output to input (IC 3G, pins 1,2,3,4,5,6) which I don't understand the purpose of, and 2 caps needed (PC10 C40 & C41) and an input to pin 1 of the hex inverter from a place on the PC10 that I do not understand where it comes from. And there is an inverted input needed for "G" on the LS245. So unless someone can explain to me what all these inverters in this last paragraph here are meant to do, or more importantly, how they are all wired, I cannot proceed with this experiment. So I will next look at pin 10 and beyond of the PPU. If someone else manages the above LS245 transplant and it clears up the glitches on the NES with RP2C03B then let us know!

Maybe Baku has the brains to figure this one out or Kevtris!

Cheers,

ARG

[Salamander]

All of this may also have something to do with the cartridges themselves.  Drakon has noted multiple times that JBs are worse with the PowerPak.  Clearly something is going on there that intensifies the problem.  I believe it was Moosmann who wrote that the Disk System version of CV2 doesn't have the problem whilst the cartridge does so it works both ways.

[Live_Steam_Mad]

Following on to the next pins on the PPU, comparing PC10 and NES, PPU pins 10,11,12 (RS2,1,0) on the PC10 go direct to 2A03E CPU pins 6,5,4 (PRG A02, PRG A01, PRG A00) and to Work RAM pins 6,7,8, and to pins 15,2,17 of IC1L (3-state Bus Tranceiver), then through IC1L and out via pins 5,18,3 of 1L then to pins 25, 24, 23 of PC10 ROM cart connector.

NES is similar in that pins 10,11,12 of PPU (RS2,1,0) go direct to pins 6,5,4 of 2A03E CPU (PRG A02, PRG A01, PRG A00) and to pins 6,7,8 of Work RAM, and to pins 11,12,13 of NES cart slot, **  BUT ** the PC10 puts these 3 pins through IC 1L (3-state Bus Tranceiver), and pins
1 and 19 (Enable A, Enable B) are both connected to ground (there are circles on pins 1 and 19 on the LS244 on the PC10 schematic, maybe this indicates "inverted"?). IC 1L is a Texas Instruments SN74LS244N and is a non-inverting version according to the datasheet.  

So for me to be able to try this, I would need to cut traces that go from pins 6,7,8 of Work RAM to pins 11,12,13 of NES cart slot, and instead solder on to the non-component side of the NES PCB 3 wires on the 3 pins of WRAM and take them to pins 15,2,17 of an SN74LS244N on a piece of breadboard and then out of the LS244, from pins 5,18,3 to pins 11,12,13 of NES cart slot. Also, pins 1 and 19 would need to be soldered to ground on the LS244, but I cannot do this experiment, because I don't understand what the circles are on pins 1 and 19 on the LS244 on the PC10 schematic? I don't know how to wire those 2 pins.

However I suspect that pins 1 and 19 of the LS244 are inverted by something (with reference to ground) and held HIGH so that bidirectional transfers are enabled at all times between WRAM and the PC10 ROM cart connector, so that the LS244 acts only as a sort of "buffer" so that's how I would try wiring on the NES it if I decide to have a go, and I would need a hex inverter chip on the breadboard as well. I don't much fancy cutting traces on my NES so I'll try some other answer on pins 13 and above of PPU...

Cheers,

Alistair G.

[skforty]

Do the toploaders have any issues with powerpaks?  Apologies if this was answered before.

Thanks!

[Salamander]

Do the toploaders have any issues with powerpaks?

If you are going to RGB mod it you should replace U2 (74LS373) with a 74HC373 to fix the graphical issues. 

[RGB32E]

If you are going to RGB mod it you should replace U2 (74LS373) with a 74HC373 to fix the graphical issues. 

Have you noticed whether or not replacing U2 with a 74HC373 is worthwhile for any other games?

[Salamander]

Have you noticed whether or not replacing U2 with a 74HC373 is worthwhile for any other games?

If you mean official Nintendo releases, no.   I went ahead and socketed that chip on my toaster for further experimentation and changing it from LS->HC->HCT types makes no difference on real carts.

It's actually possible to get a toaster NES with a 74HC373 inside it from the factory in spite of the fact that it's clearly silk screened with 74LS373.   Good discussion and the discovery of this issue is here:  http://nesdev.parodius.com/bbs/viewtopic.php?t=4016&postdays=0&postorder=asc&start=0

[ApolloBoy]

Hi Markus, you mentioned on another topic in this forum "I received the PPU from VS. Top Gun yesterday. The Chip is similar labled like the PPU from Famicom Titler and it hold the NES Homesystem colorpalette"  

Do you mean that this PPU from VS. Top Gun is RGB output but has the Composite PPU's color palette? If so, I am very interested  

I didn't really see a definitive answer for this so I thought I'd bring it up again before it gets lost. I've been thinking on and off about modding my Twin Fami for RGB and the different color palette is something I'm a little nervous about. If the Vs. Top Gun PPU actually does have the correct palette than I'd be definitely interested in doing the mod. BTW, does the Fami Titler work with games such as Super Spy Hunter?

[Live_Steam_Mad]

Hi Markus, you mentioned on another topic in this forum "I received the PPU from VS. Top Gun yesterday. The Chip is similar labled like the PPU from Famicom Titler and it hold the NES Homesystem colorpalette"  

Do you mean that this PPU from VS. Top Gun is RGB output but has the Composite PPU's color palette? If so, I am very interested  

I didn't really see a definitive answer for this so I thought I'd bring it up again before it gets lost. I've been thinking on and off about modding my Twin Fami for RGB and the different color palette is something I'm a little nervous about. If the Vs. Top Gun PPU actually does have the correct palette than I'd be definitely interested in doing the mod. BTW, does the Fami Titler work with games such as Super Spy Hunter?

You can preview the change with NEStopia 1.4 emulator. Just select the RGB palette from Options / Video Options / Palette. On SMB2, on the opening screen, it's red on RGB but brown on YUV, according to the emulator. Same happens on my real RGB NES Rev. 4 (but I can no longer compare to NTSC composite since I don't have an unmodded NTSC NES).

Yep I'm trying to get hold of the RC2C05-04 chip to get the Composite NES palette but have RGB video output quality (using Baku's mod otherwise the address lines are scrambled and it won't work!). No luck yet.

Cheers,

ARG

[Live_Steam_Mad]

I just looked at pins 13 to 20 of PPU, comparing PC10 to NES, trying to find a possible source of the graphics glitch problem.

Pin 13 PPU is DBE (inverted). On the PC10 it is connected direct to pin 5 of IC 2L (a Texas Instruments SN74LS139N (Dual 2-to-4 line decoder/demultiplexer)), and on the NES pin 13 of PPU is also connected directly to pin 5 of the same type of IC, BUT on the PC10 it's an LS series chip (Low power, Schottky) whereas on the my Rev. 4 NES it's a Toshiba TC74HC139P (High Speed CMOS), and this difference caused the NES PowerPak to stop working on the NES PCB's with the LS373 chip, everyone has to fit a HC chip instead to get the Powerpak to work.

So could that be causing the graphics glitch on the RP2C03B?

Can someone who has a NES with RP2C03B and a 74LS139 as U3 please try SMB2 and see if that game has the same 2 flashing short vertical blue lines graphics glitch on their NES (make sure you can see the last column of pixels!).

EDIT : Ahh I see that acem77 has an RGB NES with the 74LS139 as U3 that the guy seems to have used with an RP2C03B (Powerpak didn't work), I wonder if that has the graphics glitch on the SMB2 cart?

PPU Pins 14,15,16 are analog R,G,B I can't see that being the problem.

PPU Pin 17 is MVGround and goes direct to Ground on the PC10. This is the same on NES PCB where PPU pin 17  goes directly to Ground of NES PCB. Can't see how this could cause the graphics glitch.

PPU Pin 18 is CLK (CLocK) and on the PC10 goes into pin 10 of IC 2G (Texas Instruments SN74S04N (Hex Inverter i.e. six inverters). On the NES it's different, PPU pin 18 goes through C45 (51pF cap) and then though 220K ohms (R10) to the Base of Q2 and then through C43 (51pF cap) to ground, etc (i.e. from pin 18 of PPU then through the middle left section of "NES3" on the schematic). Can't see this being the source of the glitch problem.

PPU pin 19 is NMI (inverted) and on PC10 goes direct to pin 33 (NMI_) of 2A03 CPU, also through 10K ohms and then onto the main rail around the edge of the board, then through 120Ohms to ground. Also pin 19 goes to pin 13 of IC 8G (Texas Instruments SN74LS04N, Hex Inverter). On the NES, PPU pin 19 goes direct to pin 33 of 2A03 CPU and to pin 4 of Expansion port. Can't see this causing the graphics problem.

pin 20 PPU is GROUND for the PPU and and on PC10 goes directly to Ground. On NES it's indentical, PPU pin 20 goes direct to Ground on NES PCB. Can't be the source of the glitch.

Cheers,

Alistair G.

[Live_Steam_Mad]

Continuing with my search comparing PC10 and NES trying to find the possible source of the graphics glitch on the RP2C03B ;-

PPU Pin 21 is Composite SYNC (inverted) and on PC10 goes THROUGH C21 0.2uF CAPACITOR and then through 100K resistor, then through 120Ohms to ground. Also goes through the C21 capacitor to the Base of transistor Q8 (C1740).

On the NES pin 21 PPU is Composite Video, not Sync, and goes direct to the Base of transistor Q1 (A397), the Collector is Grounded, and the Emitter goes direct to pin 21 of Expansion port. Also there is a direct connection from Emitter of Q1 to R2 (150 Ohms) (on the NES Schematic it is shown as 510 Ohms instead), then through R2 to VCC (pin 36 NES cart slot), and also a direct connection from Emitter of Q1 to FC2 (Ferrite Core/Choke), then through FC2, and then through C5 (330pF) to Ground of NES PCB. From Emitter of Q1 there is a direct connection to pin 1 of the 5 pins that goes into the RF box.

On my RGB NES I am instead using pin 21 of PPU as Composite Sync (same as PC10 of course) but that's the only change from a normal Toaster NES for this PPU pin. I am still routing the Composite Sync through the RF box to amplify it, in exactly the same way that the Toaster NES does with it's Composite Video, I am using exactly the same circuit, then out to Composite Video pin on SCART, as my TV in RGB mode still uses Composite Video  to get it's Sync signal from, as do most TV's apparently. Can't see how anything on the NES Sync line (compared to the PC10) could cause 2 blue flashing short vertical lines to appear in the last column of the graphics on the RP2C03B ?

PPU pin 22 is RST (inverted), (PPU ReSeT) and on PC10 goes direct to pin 6 of IC 7E (LS 259) and to pin 9 of IC 3G (74LS04 Hex Inverter). On the NES, PPU pin 22 goes to pin 3 of 2A03 CPU, and pin 9 of U9 (Toshiba TC74HCU0P, Hex Inverter), and pin 9 of U10 (CIC Lockout Chip 3193A). No way can this be causing the graphical glitch.

PPU Pin 23 is Write Enable (WE) (inverted) and on PC10 goes direct to pin 21 of IC 4k (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and to pin 8 of IC 3M (Texas Instruments SN74LS244N, Octal i.e. eight Bus Tranceivers with 3 State Outputs. The 3-State Outputs can drive Bus lines directly. Also called a Bi-directional Eight-Bit Buffer. It is  designed for asynchronous two-way communication between data buses. The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIRection) input (pin 1). The output-enable (OE) input can disable the device so that the buses are effectively isolated). LS244 is a non-inverting version), then out from pin 12 of IC3M to A19 of PC10 ROM cart slot (WE inverted).

On the NES PPU pin 23 (CHR RAM WR_) goes direct to pin 56 of NES cart slot, and pin 21 of VRAM (U4). There is NO LS244 on the path between pin 23 of PPU to the cart slot unlike on PC10. Maybe this lack of LS244 Buffer Tranceiver chip is the cause of the graphics glitch? 

To solve this would mean adding a wire on pin 21 of the VRAM on the NES (U4) and routing it to pin 8 of a Texas Instruments SN74LS244N on a breadboard and then another wire from pin 12 of this LS244 out back to the NES cart slot pin 56. But you would also have to cut the trace from pin 23 PPU to NES cart slot 56. I don't fancy cutting traces without knowing if this is definitely the cause of the glitch.

Cheers,

Alistair G.

[Live_Steam_Mad]

Now I am looking at comparing pins 24 and 25 on PC10 and NES ;-

PPU pin 24 is RD_ (Read) (inverted) and on PC10 goes direct to pin 20 (OE) of IC 4k (VRAM, 6116, 2K x 8 bits CMOS Static RAM), and also via C44 68pF capacitor to ground, and goes (optionally) via SL5 solder enablable link to C45 100pF cap, then to ground.

On the NES, pin 24 PPU is CHR RAM RD_, goes direct to pin 21 of NES cart slot, and pin 20 VRAM (U4). I added a 68pF cap from pin 24 PPU to Ground, to be the same as the PC10 (and Famicom!) schematic, which removes the horizontal white-black-white and others flashing lines glitch that I was having in SMB1 with my Composite PPU (RP2C02E-0) but does NOT cure the 2 flashing short vertical blue lines graphics glitch on my RP2C03B NES in the last column of pixels on the SMB2 (NTSC) original game cart.

PPU pin 25 is PA13, and on PC10 goes direct to pin 10 of IC 5S (Texas Instruments SN74LS368AN, Hex i.e. Six bus drivers with 3-state outputs", or "Buffer Memory Address Registers", also called "Hex Buffers" and "Line Drivers", or "Drive Bus Lines" (the 368 version is the Inverted outputs version)) then out of pin 9 of IC 5S and into B12 of PC10 ROM cart socket labelled as PA13 (inverted)(IC 5S on the schematic is acting as an inverter) and also from PPU pin 25 direct to pin 6 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 14 of IC 3M then into PA13 i.e. A18 of PC10 ROM cart socket.

On the NES PPU pin 25 goes direct to pin 65 of NES cart slot ("CHR A13" on the NES section of Ben Heck's NES / Famicom cart slot pinout) and to pin 5 of U9 (Toshiba TC74HCU0P, Hex Inverter) (so U9 is doing the same job as IC 5S does on the PC10  ) and to the middle pin of RA2 (Resistor Array 2) then through 5.2K Ohms of RA2 to middle left pin of RA2 then to pin 36 of 2A03 CPU, also from middle pin of RA2 then through 9.7K Ohms of RA2 to far left hand pin of RA2 then to pin 35 of 2A03 CPU, also from middle pin of RA2 then through 7.6K Ohms of RA2 to middle right pin of RA2 then to pin 39 of 2A03 CPU, also from middle pin of RA2 then through 5.4K Ohms of RA2 to far right pin of RA2 then to pin 40 of 2A03 CPU and to VCC (pin 36 of NES cart slot).

Also on my NES, Pin 6 of U9 (TC74HCU04P, hex inverter) goes to pin 58 of NES cart slot (CHR A13 inverted).

Thus, maybe using a Texas Instruments SN74LS368AN (IC 5S on PC10) instead of U9 (Toshiba TC74HCU0P Hex Inverter) on the NES might solve the glitch problem, but that would require lifting pin 25 of PPU socket and soldering a wire on pin 25's PPU socket connection pin (like with the RGB mod) and wiring it to pin 10 of a Texas Instruments SN74LS368AN on a separate breadboard and then coming out of the 368 on pin 9 and going into pin 58 of NES cart slot (CHR A13 inverted), and the trace from PPU pin 25 to pin 5 of U9 wouldn't have to be cut since it's already had it's input removed by lifting pin 25 of PPU socket.

This might be one of the easier fixes. Just wish I knew if it would fix the glitch. But then this chip is merely an inverter! I don't see how this can be the source of the graphics glitch problem on the RP2C03B?!

Cheers,

Alistair G.

[Live_Steam_Mad]

Now taking a look at PPU pins 26, 27, 28, on PC10 and comparing to NES, we have ;-

PPU pin 26 is PA12 and on PC10 goes direct to pin 13 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 7 of IC 3M then into PA12 i.e. A17 of PC10 ROM cart socket.

On the NES, PPU pin 26 is PA12 (CHR A12), goes direct to pin 64 of NES cart slot. There is no Bus Transceiver between PPU pin 26 and the PA12 connection on the cart slot, unlike PC10.

Maybe this is the source of the glitch? To make the NES the same as PC10 you would have to lift pin 26 of PPU socket and have a wire going from pin 26 PPU socket to pin 13 of a Texas Instruments SN74LS244N on a piece of Veroboard, then out of pin 7 of the LS244 then into pin 64 of the NES cart slot. The existing trace from pin 26 of PPU hole on NES PCB to pin 64 of the cart slot would not have to be cut.

PPU pin 27 is PA11 and on PC10 goes direct to pin 4 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 16 of IC 3M then into PA11 i.e. A16 of PC10 ROM cart socket.

On the NES, PPU pin 27 is PA11 (CHR A11), goes direct to pin 62 of NES cart slot. There is no Bus Transceiver between PPU pin 27 and the PA11 connection on the cart slot, unlike PC10.

Maybe this is the source of the glitch? To make the NES the same as PC10 you would have to lift pin 27 of PPU socket and have a wire going from pin 27 PPU socket to pin 4 of a Texas Instruments SN74LS244N on a piece of Veroboard, then out of pin 16 of the LS244 then into pin 62 of the NES cart slot. The existing trace from pin 27 of PPU hole on NES PCB to pin 62 of the cart slot would not have to be cut.

PPU pin 28 is PA10 and on PC10 goes direct to pin 15 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 5 of IC 3M then into PA10 i.e. A15 of PC10 ROM cart socket.

On the NES, PPU pin 28 is PA10 (CHR A10), goes direct to pin 63 of NES cart slot. There is no Bus Transceiver between PPU pin 28 and the PA10 connection on the cart slot, unlike PC10.

Maybe this is the source of the glitch? To make the NES the same as PC10 you would have to lift pin 28 of PPU socket and have a wire going from pin 28 PPU socket to pin 15 of a Texas Instruments SN74LS244N on a piece of Veroboard, then out of pin 5 of the LS244 then into pin 63 of the NES cart slot. The existing trace from pin 27 of PPU hole on NES PCB to pin 62 of the cart slot would not have to be cut.

So these 3 above modications for PPU pins 26,27,28 would all have to be done as a whole  since they are identical in concept and would make the NES be like the PC10. I think this might be a little more likely to be a cause of the graphics glitch since the glitch is strongly related to the vertical position of the Character (sprite), as the top vertical blue flashing line is fixed and is inline with the SMB2 "health" status display and the lower  vertical blue flashing line goes up and down exactly with the movement of the blue enemy sprite when you go into the second door in the World 1 (see the Picassa link to my picture that I posted here a while back).

Cheers,

Alistair G.

[Live_Steam_Mad]

Taking a look at PPU pins 29 and 30 on PC10 and comparing to NES, we have ;-

PPU pin 29 is PA9 and on PC10 goes direct to pin 22 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and goes direct from pin 22 of VRAM to pin 2 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 18 of IC 3M then into PA9 i.e. A14 of PC10 ROM cart socket.

On the NES, pin 29 is PA9 (CHR A09), goes direct to pin 61 of NES cart slot and pin 22 of VRAM (U4). There is no Bus Transceiver between PPU pin 29 and the PA9 connection on the cart slot, unlike PC10.

Maybe this is the source of the glitch? To make the NES the same as PC10 you would have to lift pin 29 of PPU socket and have a wire going from pin 29 PPU socket to pin 2 of a Texas Instruments SN74LS244N on a piece of Veroboard, then out of pin 18 of the LS244 then into pin 61 of the NES cart slot. The existing trace from pin 29 of PPU hole on NES PCB to pin 61 of the cart slot would not have to be cut.

PPU pin 30 is PA8 and on PC10 goes direct to pin 23 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and goes direct from pin 23 of VRAM to pin 17 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 3 of IC 3M then into PA8 i.e. A13 of PC10 ROM cart socket.

On the NES, pin 30 is PA8 (CHR A08), goes direct to pin 60 of NES cart slot and pin 23 of VRAM (U4). There is no Bus Transceiver between PPU pin 30 and the PA8 connection on the cart slot, unlike PC10.

Maybe this is the source of the glitch? To make the NES the same as PC10 you would have to lift pin 30 of PPU socket and have a wire going from pin 30 PPU socket to pin 17 of a Texas Instruments SN74LS244N on a piece of Veroboard, then out of pin 3 of the LS244 then into pin 60 of the NES cart slot. The existing trace from pin 30 of PPU hole on NES PCB to pin 60 of the cart slot would not have to be cut.

So the modification for pins 26,27,28,29, and 30 would all have to be done at the same time as they all do the same thing. This makes the NES like the PlayChoice 10 for these pins and may stop the graphics glitch.

Cheers,

ARG

[Live_Steam_Mad]

Now looking at PPU pins 31,32,33 and 34 of the PlayChoice 10 versus the NES, they operate in the same way as each other ;-

PPU pin 31 is AD7 and on PC10 goes direct to pin 18 of IC 3K (Toshiba TC74HC373AP, Octal i.e. eight D-Type Latches with 3-State Outputs http://pdf1.alldatasheet.com/datasheet-pdf/view/214632/TOSHIBA/TC74HC373AP_07.html) then out of pin 19 of IC 3K and into A7 i.e. pin 1 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A7 of VRAM direct to pin PA7 i.e. C14 of PC10 ROM cart socket. Also PPU pin 31 goes direct to AD 7 (D7) i.e. pin 17 of VRAM and goes direct from pin 17 of VRAM to PD7 i.e. B13 of PC10 ROM cart socket.

On the NES, pin 31 is AD7 (CHR D7), goes direct to pin 18 of U2 (Toshiba TC74HC373P (Non-inverting Octal D-type Latch with 3-State output, see http://www.datasheetarchive.com/dl/Databooks-4/Book609-949.pdf) then out of pin 19 of U2 (O8, output no. then to pin 1 of VRAM (A7) and to CHR A07 i.e. pin 59 of NES cart slot. Also PPU pin 31 goes direct to AD7 i.e. pin 17 of VRAM (U4) and CHR D7 i.e. pin 66 of NES cart slot.

So therefore PC10 is identical to NES here.

PPU pin 32 is AD6 and on PC10 goes direct to pin 3 of IC 3K (Toshiba TC74HC373AP, Octal i.e. eight D-Type Latches with 3-State Outputs http://pdf1.alldatasheet.com/datasheet-pdf/view/214632/TOSHIBA/TC74HC373AP_07.html) then out of pin 2 of IC 3K and into A6 i.e. pin 1 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A6 of VRAM direct to pin PA6 i.e. C15 of PC10 ROM cart socket. Also PPU pin 32 goes direct to AD 6 (D6) i.e. pin 16 of VRAM and goes direct from pin 16 of VRAM to PD6 i.e. B14 of PC10 ROM cart socket.

On the NES, pin 32 is AD6 (CHR D6), goes direct to pin 3 of U2 (Toshiba TC74HC373P (Non-inverting Octal D-type Latch with 3-State output, see http://www.datasheetarchive.com/dl/Databooks-4/Book609-949.pdf) then out of pin 2 of U2 (O1, output no. 1) then to pin 2 of VRAM (A6) and to CHR A06 i.e. pin 23 of NES cart slot. Also PPU pin 32 goes direct to AD6 i.e. pin 16 of VRAM (U4) and CHR D6 i.e. pin 67 of NES cart slot.

So therefore PC10 is identical to NES here.

PPU pin 33 is AD5 and on PC10 goes direct to pin 17 of IC 3K (Toshiba TC74HC373AP, Octal i.e. eight D-Type Latches with 3-State Outputs http://pdf1.alldatasheet.com/datasheet-pdf/view/214632/TOSHIBA/TC74HC373AP_07.html) then out of pin 16 of IC 3K and into A5 i.e. pin 3 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A5 of VRAM direct to pin PA5 i.e. C16 of PC10 ROM cart socket. Also PPU pin 33 goes direct to AD 5 i.e. pin 15 of VRAM and goes direct from pin 15 of VRAM to PD5 i.e. B15 of PC10 ROM cart socket.

On the NES, pin 33 is AD5 (CHR D5), goes direct to pin 17 of U2 (Toshiba TC74HC373P, Octal i.e. Eight D-type Latch with 3-State outputs, see http://www.datasheetarchive.com/dl/Databooks-4/Book609-949.pdf) then out of pin 16 of U2 (O7, output no. 7) then to pin 3 of VRAM (A5) and to CHR A05 i.e. pin 24 of NES cart slot. Also PPU pin 33 goes direct to AD5 i.e. pin 15 of VRAM (U4) and CHR D5 i.e. pin 68 of NES cart slot.

So therefore PC10 is identical to NES here.

PPU pin 34 is AD4 and on PC10 goes direct to pin 4 of IC 3K (Toshiba TC74HC373AP, Octal i.e. eight D-Type Latches with 3-State Outputs http://pdf1.alldatasheet.com/datasheet-pdf/view/214632/TOSHIBA/TC74HC373AP_07.html) then out of pin 5 of IC 3K and into A4 i.e. pin 4 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A4 of VRAM direct to pin PA4 i.e. C17 of PC10 ROM cart socket. Also PPU pin 34 goes direct to AD 4 i.e. pin 14 of VRAM and goes direct from pin 14 of VRAM to PD4 i.e. B16 of PC10 ROM cart socket.

On the NES, pin 34 is AD4 (CHR D4), goes direct to pin 4 of U2 (Toshiba TC74HC373P (Non-inverting Octal D-type Latch with 3-State output, see http://www.datasheetarchive.com/dl/Databooks-4/Book609-949.pdf) then out of pin 5 of U2 (O2, output no. 2) then to pin 4 of VRAM (A4) and to CHR A04 i.e. pin 25 of NES cart slot. Also PPU pin 34 goes direct to AD4 i.e. pin 14 of VRAM (U4) and CHR D4 i.e. pin 69 of NES cart slot.

So therefore PC10 is identical to NES in the case of pins 31,32,33 and 34, so this can't be causing the glitch.

Cheers,

Alistair G.

[Live_Steam_Mad]

Considering PPU pins 35,36,37,38, they are the same on PC10 as NES, in the same way that pins 31,32,33 and 34 were ;-

pin 35 is AD3 and on PC10 goes direct to pin 14 of IC 3K (Toshiba TC74HC373AP, Octal i.e. Eight D-Type Latches with 3-State Outputs http://pdf1.alldatasheet.com/datasheet-pdf/view/214632/TOSHIBA/TC74HC373AP_07.html) then out of pin 15 of IC 3K and into A3 i.e. pin 5 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A3 of VRAM direct to pin PA3 i.e. C18 of PC10 ROM cart socket. Also PPU pin 35 goes direct to AD 3 i.e. pin 13 of VRAM and goes direct from pin 13 of VRAM to PD3 i.e. B17 of PC10 ROM cart socket.

On the NES, pin 35 is AD3 (CHR D3), goes direct to pin 14 of U2 (Toshiba TC74HC373P, Non-inverting Octal D-type Latch with 3-State output, see http://www.datasheetarchive.com/dl/Databooks-4/Book609-949.pdf) then out of pin 15 of U2 (O6, output no. 6) then to pin 5 of VRAM (A3) and to CHR A03 i.e. pin 26 of NES cart slot. Also PPU pin 35 goes direct to AD3 i.e. pin 13 of VRAM (U4) and CHR D3 i.e. pin 33 of NES cart slot.

So therefore PC10 is identical to NES here.

PPU pin 36 is AD2 and on PC10 goes direct to pin 7 of IC 3K (Toshiba TC74HC373AP, Octal i.e. Eight D-Type Latches with 3-State Outputs http://pdf1.alldatasheet.com/datasheet-pdf/view/214632/TOSHIBA/TC74HC373AP_07.html) then out of pin 6 of IC 3K and into A2 i.e. pin 6 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A2 of VRAM direct to pin PA2 i.e. C19 of PC10 ROM cart socket. Also PPU pin 36 goes direct to AD 2 i.e. pin 11 of VRAM and goes direct from pin 11 of VRAM to PD2 i.e. B18 of PC10 ROM cart socket.

On the NES, pin 36 is AD2 (CHR D2), goes direct to pin 7 of U2 (Toshiba TC74HC373P, Non-inverting Octal D-type Latches with 3-State output, see http://www.datasheetarchive.com/dl/Databooks-4/Book609-949.pdf) then out of pin 6 of U2 (O3, output no. 3) then to pin 6 of VRAM (A2) and to CHR A02 i.e. pin 27 of NES cart slot. Also PPU pin 36 goes direct to AD2 i.e. pin 11 of VRAM (U4) and CHR D2 i.e. pin 32 of NES cart slot.

So therefore PC10 is identical to NES here.

PPU pin 37 is AD1 and on PC10 goes direct to pin 13 of IC 3K (Toshiba TC74HC373AP, Octal i.e. Eight D-Type Latches with 3-State Outputs http://pdf1.alldatasheet.com/datasheet-pdf/view/214632/TOSHIBA/TC74HC373AP_07.html) then out of pin 12 of IC 3K and into A1 i.e. pin 7 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A1 of VRAM direct to pin PA1 i.e. C20 of PC10 ROM cart socket. Also PPU pin 37 goes direct to AD 1 i.e. pin 10 of VRAM and goes direct from pin 10 of VRAM to PD1 i.e. B19 of PC10 ROM cart socket.

On the NES, pin 37 is AD1 (CHR D1), goes direct to pin 13 of U2 (Toshiba TC74HC373P, Non-inverting Octal D-type Latch with 3-State output, see http://www.datasheetarchive.com/dl/Databooks-4/Book609-949.pdf) then out of pin 12 of U2 (O5, output no. 5) then to pin 7 of VRAM (A1) and to CHR A01 i.e. pin 28 of NES cart slot. Also PPU pin 37 goes direct to AD1 i.e. pin 10 of VRAM (U4) and CHR D1 i.e. pin 31 of NES cart slot.

So therefore PC10 is identical to NES here.

PPU pin 38 is AD0 and on PC10 goes direct to pin 8 of IC 3K (Toshiba TC74HC373AP, Octal i.e. Eight D-Type Latches with 3-State Outputs http://pdf1.alldatasheet.com/datasheet-pdf/view/214632/TOSHIBA/TC74HC373AP_07.html) then out of pin 9 of IC 3K and into A0 i.e. pin 8 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A0 of VRAM direct to pin PA0 i.e. C21 of PC10 ROM cart socket. Also PPU pin 38 goes direct to AD 0 i.e. pin 9 of VRAM and goes direct from pin 9 of VRAM to PD0 i.e. B20 of PC10 ROM cart socket.

On the NES, pin 38 is AD0 (CHR D0), goes direct to pin 8 of U2 (Toshiba TC74HC373P, Non-inverting Octal D-type Latches with 3-State output, see http://www.datasheetarchive.com/dl/Databooks-4/Book609-949.pdf) then out of pin 9 of U2 (O4, output no. 4) then to pin 8 of VRAM (A0) and to CHR A00 i.e. pin 29 of NES cart slot. Also PPU pin 38 goes direct to AD0 i.e. pin 9 of VRAM (U4) and CHR D0 i.e. pin 30 of NES cart slot.

So therefore PC10 is identical to NES on PPU pins 31,32,33,34,35,36,37 and 38, so this can't be causing the glitch.

Cheers,

Alistair G.

[Live_Steam_Mad]

Probably not a wise thing to do to the one and only RGB NES I have on hand to mess around with but I did decide to tinker yesterday after reading the posts here.  Grounding out the PPU data bus pins one at a time, specifically ALE and AD0 through AD7 leads me to believe this is where the problem may be.  Obviously grounding any of these is going to produce graphical issues but ALE through AD2 in particular were interesting.  It produced black bars a few pixels thick, evenly spaced, at roughly the same positions on the screen as the jailbars.  Could be a good place to start looking?

I just traced PPU pins AD0 though AD7 and the NES is identical to the PC10, and uses the exact same Toshiba TC74HC373P. However ALE on PC10 is routed through a LS367A, which doesn't exist in the NES, as you rightly pointed out.

So that might be where the glitch is coming from on my Rev.4 NES on SMB2 with RP2C03B. To solve it, I would have to lift PPU socket pin 39 and solder a wire from there to pin 2 of a Texas Instruments SN74LS367AN (A Hex i.e. Six Bus Drivers with 3-State Outputs) on a separate piece of Veroboard (LS367 is the True outputs version, LS 368 is Inverted outputs, datasheet is here http://pdf1.alldatasheet.com/datasheet-pdf/view/27433/TI/SN74LS367AN.html ), pin 3 is wired to pin 4, pin 5 is wired to pin 6, and then out of pin 6 and going into pin  11 of U2 (the Toshiba TC74HC373P). You wouldn't have to cut the trace on the existing line from PPU pin 39 to U2 in this case. Dunno what's happening on pin 8 of the LS367, hopefully not important. Also, as you mentioned, there is interaction between pins 9 and 10 of the IC and pin 31 of the CPU, so  pin 10 of the LS367 has to connect to CPU pin 31, and I can't work out where you need to solder pin 9 to. And as you mentioned, pin 11 of LS367 needs to go to IRQ (inverted) i.e. pin 15 of NES cart slot, pin 12 of LS367 has to go to IRQ (non-inverted) of CPU i.e. CPU pin 32, so you would solder it onto the rear (solder side) of the NES PCB, pin 13 of the LS367 has to go to R/W (inverted) i.e. pin 14 of the NES cart slot, pin 14 of LS367 has to go to WE (inverted) i.e. pin 21 of Work RAM, and pin 15 is grounded. Pin 1 also has to be Ground and pin 16 must be VCC I suppose.

If you've already wired up a LS367 exactly as above and found that it didn't stop the glitches, or if not you then Drakon as I he tried it (I don't care about the jail bars as I don't see them) in SMB2 on a Toaster NES, then I give up. If either of you just tried e.g. the CPU pin 31 to pin 10 and only part of the above then I might try it myself sometime.

Pin 40 is the last pin and it can't be VCC that's causing the glitch surely LOL.

Well that's it, I'm outta pins. Was an interesting excersise which got me some more soldering practice and I learned some new techniques, but I'm stuck with the remaining glitches on this NES until I try some of the above experiments maybe. Anyway if I can't be bothered then instead I'll finish up (I need to add an amp in the audio mod, but I figured that one out already after I found a webpage for it, it needs a bi-polar power supply but I found a schematic for one so I should be able to do it) and report back when my RGB NES is looking finished. I got the blue and green and white soft touch knobs (LOL) from Maplin (I had the red already) for the R,G,B pots (the 500 Ohm pots arrived also) so I've got the stuff to finish the mod.

Next step would be adding an RP2C03B to an AV Famicom but that means $$ that I don't have at the moment, since I can't afford an AV Famicom (40 GBP minimum plus expensive postage plus hit for Customs Fees and VAT...) Also I want to try the Baku mod on an RC2C05-04 and see if I get the Composite palette with RGB video quality.

Cheers,

Alistair G.

[Salamander]

I'd like to see some evidence the issues aren't present on actual Playchoice hardware.  Finding video capture of live gameplay doesn't seem to be that easy though.

[Live_Steam_Mad]

I'd like to see some evidence the issues aren't present on actual Playchoice hardware.  Finding video capture of live gameplay doesn't seem to be that easy though.

If you look at reply #288 here I found a youtube video of Gamester81's actual PlayChoice 10 cab and you can see clearly on his video that you can see the last column of pixels in SMB1. So he must be able to see the last column of pixels in SMB2. And he has got SMB2 for his PlayChoice 10. I described to him the picture glitch being 2 short blue vertical lines in the last column of pixels on the right of the screen that were flashing constantly in SMB2 on my NES, and he confirmed to me that he does not see this glitch AT ALL on his PC10. That's about as good evidence as I'm gonna get short of contacting yet another person with a real PC10 cab. So I'm personally convinced that PC10 doesn't have the glitch even though it has the same RP2C03B PPU as I am using.

Would be great if anyone else reading this topic who has a real PC10 cab and confirm one way or the other through.

Cheers,

Alistair G.

[Dr.Wily]

PAL french NES moded to RGB and works flawlessly.

The tricky part is the AV box, it converts composite to RGB. First it removes the video signal and kept only the sync. I must take video signal before it's sent to the AV box. Second, there is some component who generate some EM interferences and is resulting in a distorted and unstable image. This is the case of RGB amp part in AV box, after the Sony v7021 chip. I remove the transitors and... tadaa clear bright RGB image... but with some jail bars. No problem I take the ground for the RGB amp from VEE pin on PPU.

Finaly, I kept AV box powered to allow blanking signal works on scart TV.

Actually in some games, original video signal feel more "natural" than RGB. Look at these pics :

Original composite :skyscrapers seem futuristics


RGB : skyscrapers smell good the eighties soaps  


Now you can have a french NES who switch automaticaly your TV in AV and deliver a true RGB image.

some others photos here

[kschafer2598]

Seems like some address/data lines are short-circuited or unconnected. I'd also check the cartridge connector pins. My famicom has similar issues if I push the cartridge full way down, but if I pull it a bit up from the bottom then it's fixed. I have RP2C03B inside the famicom so it shouldn't be a compatibility issue.

Thanks for the info, I'll give it a shot. Weird thing is that with the stock fami PPU it works fine - no glitches. I was thinking that maybe I screwed up  a trace or crossed something somewhere but since the standard PPU works I'm not sure what could be wrong.

I know I'm replying to my own post from for ever ago, so sue me I just wanted to update this in case anyone else experienced the problems I did, because to be honest, it drove me crazy.

I was not able to get the PC 10 PPU to work in the famicom I had it in - nothing would work. I ended up giving up on it after learning that there are different versions of the 1st model famicoms, and that some are easier to mod for RGB than others. I ended up finding a much earlier unit that worked perfectly the first time around - it has a serial number H5966785 with a solid blue cartridge slot. Also, it has flexible wires between the power/rf board, rather than being secured to the board.

The one that DIDN'T work had an HC serial number and a metal surround on the cartridge slot.

Hope this helps anyone modding the early famicoms.

[Hamburglar]

I know I'm replying to my own post from for ever ago, so sue me I just wanted to update this in case anyone else experienced the problems I did, because to be honest, it drove me crazy.

I was not able to get the PC 10 PPU to work in the famicom I had it in - nothing would work. I ended up giving up on it after learning that there are different versions of the 1st model famicoms, and that some are easier to mod for RGB than others. I ended up finding a much earlier unit that worked perfectly the first time around - it has a serial number H5966785 with a solid blue cartridge slot. Also, it has flexible wires between the power/rf board, rather than being secured to the board.

The one that DIDN'T work had an HC serial number and a metal surround on the cartridge slot.

Hope this helps anyone modding the early famicoms.

Are you sure the boards wasn't just damaged in some way during the installation?

How'd you get by the fact that the PPU (At least in the models I've seen) is very close to the eject mechanism, does your eject lever still work? I'm guessing you did not use the heatsink?

[mvsfan]

im about to jump into this and ill let you know how it goes.

ive got a few ideas.

Im going to be using an ultimarc rgb amp and am going to replace the resistors/caps on the rgb lines of it to the correct ones.

ive read that the ultimarc amp is a bit too bright on the nes out of the box.

i am also going to take some sheilded mini-coax from a cheap a/v cable to use for the rgb lines, and ground the sheild to the scart connector and pin 17.  should that clear any jailbars i may get?

i added composite to my toploader a while back and i used this same sheilded cable and grounded it to my video amp ground and i never did get any bars with the composite mod.

[Drakon]

Pretty much everything I've posted in here is long out of date.  Updates can be found on my forum here:

http://consolemods.forumotion.ca/

[Live_Steam_Mad]

Markus, I saw that here http://nesdev.parodius.com/bbs/viewtopic.php?t=601&postdays=0&postorder=asc&start=90&sid=32c4296994cfe0bd4294cd99a2adb685 you said "I got an old Famicom last week and i see very much vertikal stripes lines.

To reduce the lines, lift Pin 21 from the PPU or disconnect the line from pin 21 to 2sc...transistor and solder the Video-Amp directly to the PPU. However, you always have some vertikal lines on some games (e.g. Bird Week), so please solder an 220uF electrolyt capacitor between PPU Pin 40 and GND. You also have to take the 5V for the Video Amp from PPU Pin 40 (...and 220uf capacitor) and not from an other 5V place from the PCB.

Solder an 220uF electrolyt capacitor without lift Pin 21 from the PPU or vice versa don`t make it 100% stripes free.

Greeting Markus"

...and I was wondering should I be adding a 220uF electrolytic capacitor with positive leg onto pin 40 of PPU (PPU pin 40 not lifted) and negative leg going to GND (which ground?!, pin 20 of PPU ? I assume if so that you do not lift pin 20 of PPU) on my RGB modded USA Toaster NES revision CPU-04, would that reduce the Jail Bars?

Just noticed that you also mentioned this at http://nfggames.com/forum2/index.php?topic=2990.0

Ahh Arasoi already tried this on his ;- http://nfggames.com/forum2/index.php?topic=1592.msg28786#msg28786 but it didn't do anything to the jail bars, but I he didn't say what revision his NES is (he is using RP2C03B).

Also should I be taking 5V from PPU pin 40 (PPU pin 40 not lifted I assume) to power the RGB amp (which is your design), because  I took 5V from the large PCB trace next to one of the cart slot connections, just like you are doing on your web page guide made a while back.

Drakon also mentioned in a post to try connecting pin20 of PPU (ground) to the ground of the video amp, that finally completely removed the jail bars on his NES revision 6 and also removed the audio buzzing (only worked when he also had pin17 of PPU lifted and connected to the SCART ground). I need to try that (minus that last part, I'm not lifting pins now!) since I have my RGB amp' ground wired to a place just to the right of my 5V cart' slot pin connection that I mentioned above, again just like Markus did in his web page guide.

I have very mild jail bars when I am running my video projector with new lamp in it (Infocus IN76)  on maximum sharpness, and they are only visible on certain colors (blue/purple sky and orange/browns also) and not visible on my 14" Sony Trinitron TV. The jail bars are rather faint on my IN76, and not visible at all in black areas, this being with the RP2C03B batch code 8L4 18 that had a heatsink on that I just sold to Martin Larsen in Denmark.

Also I read here http://nesdev.parodius.com/bbs/viewtopic.php?t=601&postdays=0&postorder=asc&start=165 that "you need to add a 47uF - 100uF capacistor between PPU #22 (SYNC) and #20 (GND) <-- This is like magic and removes - if not all, most of the vertical bars. I've done this on several Famicoms with good result. Some machines give more jailbars then others and with the cap over #22-#20 they dissapear or become wery faint depending on how much interference there is."

...so should I add a cap between PPU Pin22 (RESET) and PPU Pin 20 (Ground) on my RGB modded NES to reduce the Jail Bars ? http://jpx72.detailne.sk/modd_files/fc/avmod.htm

I would also like to be able to get rid of the stupid blue artefacts at the right edge of the screen that I see every time in Super Mario Bros 2 (USA cart) when played on my USA Toaster NES revision CPU-04 with the chip I just mentioned that I sold to Martin (and on all my other 4 off RP2C03B's)... I thought Drakon didn't have them with revisions 6, 10, and 11 of the NTSC NES,  but he said "I didn't play mario 2 on a toaster I played it on the av famicom.  My nes-cpu-06 toaster I will test later", so I'll have to go and ask Drakon about that. Or I'll get a revision 2 AV Famicom (like Drakon has) if I can afford it.

Also, has anyone managed to use an RP2C05-0x and get the original NES palette but with RGB signal quality yet?

Cheers,

Alistair G.

[ApolloBoy]

Also, has anyone managed to use an RP2C05 and get the original NES palette but with RGB signal quality yet?

Drakon tried the RC2C05-04 that was shown here earlier and he said that it has the same palette as all the other compatible RGB PPUs.

[panzeroceania]

All of this may also have something to do with the cartridges themselves.  Drakon has noted multiple times that JBs are worse with the PowerPak.  Clearly something is going on there that intensifies the problem.  I believe it was Moosmann who wrote that the Disk System version of CV2 doesn't have the problem whilst the cartridge does so it works both ways.

I wonder if it would be possible to create a cartridge adapter that you would plug your cartridge into this device, and then it would have an AC filter on all the voltage lines, then the device would plug into your Famicom/NES and it would hopefully reduce AC interference and noise.

Another solution might be some kind of AC filtering base that you could set your famicom/NES on top of that would filter out AC noise.

The only problem is such devices don't currently exist AFAIK.

[Live_Steam_Mad]

Also, has anyone managed to use an RP2C05 and get the original NES palette but with RGB signal quality yet?

Drakon tried the RC2C05-04 that was shown here earlier and he said that it has the same palette as all the other compatible RGB PPUs.

Got a link for that? I'd love to see it!

Cheers,

ARG

[Live_Steam_Mad]

OK I just found the topic ;-

http://consolemods.forumotion.ca/t28-the-rare-rc2c05-04-ppu?highlight=RC2C05

BTW Holy Cow, the PPU that I sold to Martin is looking good ;-

http://www.playright.dk/forum/emne/26126-vis-os-dit-mod-traaden#557027

(his user name is Konsolkongen)

Cheers,

Alistair G.

[DaddyLongLegs]

edit: wrong thread

[Live_Steam_Mad]

Hi Skips, I see you used a revision 10 toaster NES (NTSC) and an RP2C03B. Do you get the 2 short blue lines on the right on the first part of your USA version SMB2  game with the black screen (where you fall down the screen a long way) ? I can see you have enough overscan on your HDTV to show it if it's there.

I am using Rev. 4 NTSC toaster NES and USA version SMB2 and I see the 2 short blue lines.

Cheers,

Alistair G.

[Live_Steam_Mad]

I take it you are talking about this? A second one shows up for a split second when falling on the right side. There are a few oddities like that even though I have the 68pf capacitor on pin 24.

Hi, yes that's the glitch that I get. Well now I know revision 10 NES can't cure it LOL.

Funny you should post here tonight as I was just soldering up the audio amplifier mod to the NES to make the stereo sound up to line level strength since it's weak and annoying when you do the standard stereo mod. I'll post a little update if it works.

Cheers,

Alistair G.