NES RGB mod

[Moosmann]

I was out of town in Italy and now I´m vocationally busy. I havent read all postings, but i read them this weekend. To answer two questions:

1.) The Graphic problem in SMB2 is normal. You don`t see them on a crt with overscan. If you use the 2C03 "C" PPUs or the PPU from FC Titler, they don`t have them.
2.) C1 heatsink is attach direktly on the middle square with marking from the PPU and not on the ceramic package. C1 PPU is working 100% identical with the Playchoice PPU.

Greetings Markus

[Drakon]

from my experience jailbars are effected by two things:

The first is: The type of nes/famicom pcb you're using.  So far the most jailbar free pcbs I've found are the nes 2 and the av famicom

The second is: The rgb ppu chip itself...... I did 6 commission av famicoms with rgb, s-video, audio upgrades, the works.  I went through 8 rgb chips, they all came from dual moniter playchoice boards and they were all rp2c03b....but one chip had less jailbars than the others....  Right now my revision 2 av famicom has the "good" ppu inside of it and I get jailbars in....well.....nothing

all my legit carts are jailbar free.  My powerpak is jailbar free.  And all my repro carts are jailbar free too.  If I take screen captures from the good ppu on my ultra sensitive capture card you can see there's still some interference but it's much too weak to show up on my crt.  I also took screen captures from my other rgb chips and the interference was stronger on the other chips.

But even with the common rgb chip inside of my av famicom I only got annoying jailbars on duck tales 1 stage 1 and the stage select in my rockman 1 reproduction cart.  And my powerpak would have mild jailbars that weren't really strong enough to annoy me.

One client I did a commission for said he gets mild jailbars on his hdtv through a xrgb3.  But he said it's not that bad.  Another client said his rgb av famicom is way better than his rgb toaster.  He was also surprised that the s-video right out of the system coming from a cxa1645 circuit looks amazing.

Here's s-video straight into a hd tv



Here's some more pics of the systems in action





All s-video

[Live_Steam_Mad]

GPU RAM heatsinks (like these: http://tinyurl.com/3fbcx5l) would probably do the trick and usually have a thermal adhesive pad backing.  If you want something more substantial try Arctic Silver thermal adhesive.  I'd personally like to see how the C1 PPU was prepared since the heatsink there is different from what is in the Playchoice and covers the entire chip.

Hey thanks for the link to those heatsinks, looks like they could be rather useful for this application.

The RP2C03B has a space either side of the raised central (die) section, each space is 18mm long x 15mm wide. The die containing central section is 14mm square and is raised up about 1mm above the left and right sections.  

I have ordered some and I will try them. I like the self adhesive thermal pads that they have and their 6mm low profile Aluminium alloy heatsinks. In case anyone wants to buy them later on but can't find them when the Ebay link dies after 90 days, the description is "8 x GPU RAM VRM Heatsinks With Adhesive Thermal Tape" and "8 small heatsinks suitable for RAM, GPU's, games consoles, laptops, and other electronics to provide better cooling and reduce over-heating.

* The heatsinks come with 3M adheisive thermal tape on the back, just peel and stick!
* The shape helps to quickly dissipate heat.
* Made from aluminium alloy.
* Each heatsink is approx 15x14mm and 6mm high.

I use these on my ATI 5870's bare memory chips and they knock about 10C off at idle, and 20C at load!".

Sounds like just what I need. BTW here is a picture showing how high the PlayChoice 10 PPU / heatsink combo. sticks out below the expansion port. It's a shame that the chip will be upside down in the NES, it doesn't do the heat transfer characteristics any favours.

I ran the board with the this exact PPU in the picture below facing downwards for several hours and it didn't hang the NES. When I felt the heatsink it was as hot as a hot cup of tea, and I was able to keep my fingers on it for 10 seconds and over without burning myself, but I thought to myself wow if it's this hot with a heatsink, how hot does it get without one (!). I think it runs cooler in the PC10 as the enclosure it's in is larger and made of metal, and the board is on it's side and it isn't upside down in a small plastic container like it is in the NES.

Cheers,

Alistair G.

[Live_Steam_Mad]

Here is the bottom of the toaster NES showing why the PlayChoice 10 heatsink won't fit, it's because of the plastic below the expansion port that is recessed upwards into the casing.

ARG

[Live_Steam_Mad]

I found out (after much scraping of the Epoxy off the chip) that it doesn't matter how sharp a craft knife you use on the left and right sections of the RP2C03B or how hard you scrape (you'll only bend the legs of the chip if you put too much pressure on, and the sharp blade becomes blunt towards the front) and there's sometimes only so much you can remove using the hairdryer and knife. My original RP2C03B that I used (pictured below) was a bitch to clean, the Epoxy just wouldn't all come off, so then I just started scraping at it with a fresh blade in my Tamiya Fine craft knife on a cutting board. I attacked the hell out of it. The ceramic started to look shiny or metallic like in places almost as if I had removed the top layer of ceramic and exposed something underneath

Then I also discovered that sometimes the only way to remove the remnants on there is to use P400 grade Silicon Carbide (used dry). After much sanding the remains finally started to slowly come off. The shiny areas of the ceramic where I thought I had damaged the surface just went back to being purple matt again and the epoxy showed up really well by going matt black. Then I realised that you cannot damage the surface at all with the P400, even the gold line and plus sign. All went well and I got off all of the remains of the epoxy and then cleaned with White Spirit and it looks like new again. The surface is very smooth to the touch, as the ceramic is extremely hard and resists the P400 grit almost completely. I think it will be a good enough surface to accept the thermal pad on the heatsinks that I bought, I just hope the heatsinks don't come off when the chip is upside down in the NES and is hot.

Also I had a thought that I clean every cart I buy with Isopropyl Alcohol on the contacts using cotton buds on plastic sticks, and I am plugging in old dirty chips into my nice clean new precision socket, so I thought that I should clean the legs of each PPU that I try. So I clean the insides of the legs with the same method and by putting the chip on a sheet of Aluminium whilst I am doing it, and then clean the outsides of the legs by placing the legs of the chip along the edge of the Alu. sheet so they don't get bent.

First pic' below shows the chip just after I had finished attacking the heck out of it with the sharp knife / hairdryer. Second pic shows what it looks like after you use P400 on it and then wipe with White Spirit (Mineral Spirits).

Cheers,

Alistair G.

[Live_Steam_Mad]

I was out of town in Italy and now I´m vocationally busy. I havent read all postings, but i read them this weekend. To answer two questions:

1.) The Graphic problem in SMB2 is normal. You don`t see them on a crt with overscan. If you use the 2C03 "C" PPUs or the PPU from FC Titler, they don`t have them.
2.) C1 heatsink is attach direktly on the middle square with marking from the PPU and not on the ceramic package. C1 PPU is working 100% identical with the Playchoice PPU.

Greetings Markus

Hi Markus, thanks for the help with getting my TV into RGB mode (5V onto pin 16 via 75Ohm resistor) it worked great and I got an excellent quality color picture.

In 1) above, when you say that this graphical problem in SMB2 is normal, are you meaning that it is always present on the RP2C03B when you don't add any cap from pin 20 to pin 24, or are you saying that it is always still there after you have applied the 68pF cap?

I see you said that the C1 TV puts the heatsink on the middle section, that's the proper (intelligent!) way of doing it. I will be putting a small heatsink on both sides (left and right) and also one in the middle to completely cover the chip (since every chip I ever saw with a heatsink always covers the whole chip, the PC10 PPU was the first chip I saw that left the central core with no heatsink on it but the left and right covered!

Does the C1 use the same RP2C03B chip? Or yet another variant that performs the same? Later EDIT: No, the Sharp C1 Famicom TV uses the RP2C03C, which, along with the Titler chip (RC2C05-99) do not have the 2 blue vertical lines glitch on the last column of pixels in SMB2.

Have you got any pictures of the PPU inside the Sharp C1 Famicom TV? I'd love to see that. I couldn't find any online despite Google searches...

Cheers,

Alistair G.

[Live_Steam_Mad]

Right now my revision 2 av famicom has the "good" ppu inside of it and I get jailbars in....well.....nothing

Hi Drakon,

I didn't know there were 2 different revisions of the AV Famicom?! Got any links or pics showing the 2 PCB's?

Personally I can't see what all the fuss is about with the jail bars, they never show up on my revision 4 NES on SMB1 or SMB2 (the only games I have yet!) on my 14" TV and 29" TV and I can only see them when I turn the brightness way up. With contrast at 75 per cent and brightness just over half way or a bit more the jail bars are invisible, with room light on or off, viewing on TV. Doesn't matter which PPU I use out of the 3 of 5 I have tested so far. Even on the very clean and sharp projector that usually shows every slightest defect in everything I see only very faint jail bars. With room light on or off viewing the pj. And I only have an NTSC USA toaster NES. The 3 RP2C03B chips I tried so far all have the same amount of jail bars at very high brightness TV setting (including a later production one and a very early white ceramic and gold one).

What capture card are you using? I don't have one! I also don't have a HDTV to test with but I do plan on getting a line doubler for use with my PC CRT monitor. However I tried 640 x 480 on my PC and I hate the scanlines on it. I would like a scaler and line doubler combo or separates, preferably something cheap-ish or a circuit that I can build. Wish someone would give me a schematic for one. I have no money for expensive scalers etc.

Cheers,

Alistair G.

[Drakon]

easiest way to tell the revision is the bottom sticker



one on the left is revision 2, one on the right is revision 1

also when you open them up the rev 1 says something like hvcn-cpu-01 rev 2 says hvcn-cpu-02

my capture card is easycap

http://www.ebay.com/itm/Save-HD-XBOX-360-PS3-Wii-Grabber-USB-CAPTURE-CARD-/270805100464?pt=LH_DefaultDomain_0&hash=item3f0d3de7b0

On the toaster models nes-cpu-10 and nes-cpu-11 I got jailbars pretty much all the time.  On the nes 2 and the av famicom I only get visible jailbars on duck tales 1 american cart, rockman 1 reproduction cart, and very mild jailbars on the powerpak

[Live_Steam_Mad]

OK so I fitted the 68pF capacitor as recommended by Markus for the RP2C03B (and after tracing the circuit on the PlayChoice 10 myself, there is indeed a 68 pF cap between pin 20 / ground and pin 24. I checked my NES and there is no resistance between one leg of the cap and ground, and no resistance between the other leg of the cap and pin 24. There are now no signs of the horizontal broken blue lines on the underground stages of SMB1, or anywhere else on that game (so it seems the cap mod only solves the horizontal short flashing lines problems), BUT there are still the 2 flashing short vertical blue lines in SMB2 on a lot or all of level 1 and still a white border to the right on the intro screens of SMB2. This is quite annoying. There is also the less annoying glitch on the top right whilst rendering new screens on SMB1.

I understand that if I could get a video processor or enter the engineering setup menu of my 14" TV I could engage more overscan and make the glitches dissappear off the edges of the screen, but I wanted to know if these glitches on SMB2 are visible when playing the official SMB2 PC10 version on an actual PlayChoice 10 arcade cab' as my NES is using the PPU from my PC10 board. Or does the PlayChoice 10 use just enough or quite a lot of overscan on it's monitor to get rid of the problem? Is there an overscan control on the monitor of the PC10 to adjust the overscan?

No-one online seems to have done a video of the PlayChoice 10 running SMB2. Although, comparing NEStopia to a real PlayChoice 10 running SMB1 ;- Nintendo Playchoice 10 Arcade Review ...I can infer that Gamester81's real PC10 shows line 1 (not line 0, line 0 is off the left edge of the screen) and line 255 with a border after the latter (I don't know if you can vary the overscan on a PC10 monitor). See at 6m21s into video. So surely PC10 on SMB2 should also have that glitch that I get ? If not then there is something that the PC10 board is doing that I am not. I shall ask this guy about SMB2 as he has that game on his PC10 and have a look at my PC10 PCB again.

On the bright side all of my 5 PPU's work astonishingly, even the one which had the rediculously mashed up legs that I showed a picture of where I straightened the legs. Now waiting for my low profile heatsinks to arrive so I can stick them onto my PPU (I am using the one with the highest batch number printed on it that I have, the 9F one). I tested and all 5 RP2C03B's have the same glitches in SMB2. So Markus is right, the glitch is normal for the RP2C03B (at least in my Revision 4 NTSC USA NES) and a 68pF cap doesn't solve the problem. Darn.

Pic' below shows the cap and where I soldered it to on my revision 4 NES. I did this like Markus shows on his webpage, i.e. connected one leg of the cap to ground instead of pin 20, for neatness. I checked and there is definitely no resistance between pin 20 and ground on the NES in any case. I used a 5 per cent tolerance (coded J) metallised ceramic plate capacitor from Maplin, with a temperature coefficient of near zero (temperature stabilised) (you can tell from the black paint on the top of it).

Cheers,

Alistair G.

[Live_Steam_Mad]

Here is my RGB mod so far (see pic' below) showing the places that I took ground from on the NES PCB for Composite Sync Ground and stereo audio mod ground instead of taking ground from on the Moosmann amp, to get a noise free picture with no visible jail bars on my mod as long as brightness is just over medium and contrast at 75 per cent or below. Still have to add the extra audio amp for the stereo mod. My 14" TV Sony KV-14LT1U has ENORMOUS punch and the colors look dazzling, it has many times more brightness than my 20" CRT PC monitor or my projector, I adore it, and am now looking to buy the KV-21LT1U. Don't think they made a larger one than 21 inch in that model? I tried running NEStopia in 640 x 480 and hated the scan lines, and at 1280 x 960 the scanlines are gone and it's sharp but the display on my PC CRT monitor is very dissappointing, at maximum brightness and contrast the white lettering at the top of the screen in SMB1 looks grey. Not good compared to my dazzling 14" CRT TV.

Cheers,

ARG

[Live_Steam_Mad]

I just found a page showing the NES palette compared to the RGB palette ;-



http://nesdev.parodius.com/bbs/viewtopic.php?t=7200&postdays=0&postorder=asc&start=15 (page 2)

Credit goes to ccovell of Japan for this.

Cheers,

ARG

[Salamander]

Makes perfect sense now why the background in stage 2 of Castlevania changes from red to a shade of purple.  Again though, I'd point out you can fix most of the  oversaturation just by adding pots.   In my experience blue is really the main offender and dialing just that line back a little bit can make all the difference.

[Drakon]

Oh heck if you're using s-video like me you can just add resistors to the chroma wire.  Me personally I love the ultra bright and vibrant colours of the rgb ppu

[Live_Steam_Mad]

OK I got a reply from Gamester81 who has a PlayChoice 10 cab and SMB2 working on it and he said "Hey Alistair, My SMB2 works fine on my Playchoice 10 without any glitches. It sounds like it could be the connection to the board perhaps. I'm not really too savvy when it comes to stuff like this though to be honest. I'm sorry I'm not much of a help.

-John"

So it begs the question, how come his screen shows the WHOLE of the pixels on the right of SMB1 (from 1 to 255, doesn't show the very left most pixel i.e. pixel 0) and so the glitch should show up on his SMB2 game since I thought it used identical code and an identical PPU to me (RP2C03B that I took out of my PC10 PCB's that I have right here), and he doesn't see the vertical blue flashing lines glitch on his PC10 BUT I SEE THEM ON MY RGB NES      WHY the hell is this?  Personally I still think we are missing something from the PC10 PCB which isn't on my NES board which would maybe solve this (like the 68pF cap did for the flashing horizontal lines in SMB1 etc). We need this sorting out, we've come this far already, surely we can solve this?

Over to you Markus, Baku, Drakon, or any of you other NES genius's out there. HELP!!

I'll try and contact Kevtris as well, he seems to be the ultimate god of modding.

Cheers,

Alistair G.

[Live_Steam_Mad]

Right, I went all the way through pins 1 to 40 on the PPU on the PlayChoice 10 schematic ;-

http://www.basementarcade.com/arcade/library/manuals/p/index.html

http://playchoice.riemen.net/rep_manuals.html

...and simulteously traced all the lines with a multimeter for all the interesting signals (ones that weren't data or address) and I found ;-

pin 1 is R/W_, goes direct to pin 34 of 2A03 CPU and pin 13 of IC 3G and pin 21 (WE) of IC 2K (2K x 8 bits SRAM / Work RAM)

pin 2 is D0, goes direct to pin 9 of IC 2K ( WRAM) and pin 3 of IC 8F and pin 3 of IC 8E and pin B30 of PC10 ROM cart slot and direct to pin 18 of IC 1K (LS245, 3 state Bus Tranceiver) then out of pin 2 of IC 1K direct to pin 28 of 2A03 CPU

pin 3 is D1, goes direct to pin 10 of IC 2K (WRAM) and pin 5 of IC 8F and pin 5 of IC 8E and pin B29 of PC10 ROM cart slot and pin 17 of IC 1K (LS245, 3 state Bus Tranceiver) then out of pin 3 of IC 1K direct to pin 27 of 2A03 CPU

pin 4 is D2, goes direct to pin 11 of IC 2K (WRAM) and pin 9 of IC 8F and pin 9 of IC 8E and pin B28 of PC10 ROM cart slot then and pin 16 of IC 1K (LS245, 3 state Bus Tranceiver) then out of pin 4 of IC 1K  direct to pin 26 of 2A03 CPU

pin 5 is D3, goes direct pin 13 of IC 2K (WRAM) and pin 11 of IC 8F and pin 11 of IC 8E and pin B27 of PC10 ROM cart slot and to pin 15 of IC 1K (LS245, 3 state Bus Tranceiver) then out of pin 5 of IC 1K direct to pin 25 of 2A03 CPU

pin 6 is D4, goes direct to pin 14 of IC 2K (WRAM) and pin 13 of IC 8F and pin 13 of IC 8E and pin B26 of PC10 ROM cart slot and pin 14 of IC 1K (LS245, 3 state Bus Tranceiver) then out of pin 6 of IC 1K direct to pin 24 of 2A03 CPU

pin 7 is D5, goes direct to pin 15 of IC 2K (WRAM) and pin B25 of PC10 ROM cart slot and pin 13 of IC 1K (LS245, 3 state Bus Tranceiver) then out of pin 7 of IC 1K direct to pin 23 of 2A03 CPU

pin 8 is D6, goes direct to pin 16 of IC 2K (WRAM) and pin B24 of PC10 ROM cart slot and pin 12 of IC 1K (LS245, 3 state Bus Tranceiver) then out of pin 8 of IC 1K direct to pin 22 of 2A03 CPU

pin 9 is D7, goes direct to pin 17 of IC 2K (WRAM) and pin B23 of PC10 ROM cart slot and pin 11 of IC 1K (LS245, 3 state Bus Tranceiver) then out of pin 9 of IC 1K direct to pin 21 of 2A03 CPU

pin 10 is RS2 (PRG A02), goes direct to pin 6 of 2A03 CPU (A2) and pin 6 of IC 2K (WRAM) and pin 15 of IC 1L (3-state Bus Tranceiver) then comes out of pin 5 of IC 1L then goes direct to C25 of PC10 ROM cart slot  

pin 11 is RS1 (PRG A01), goes direct to pin 5 of 2A03 CPU (A1) and pin 7 of IC 2K (WRAM) and pin 2 of IC 1L (3-state Bus Tranceiver) then comes out of pin 18 of IC 1L then goes direct to C24 of PC10 ROM cart slot

pin 12 is RS0 (PRG A00), goes direct to pin 4 of 2A03 CPU (A0) and pin 8 of IC 2K (WRAM) and pin 17 of IC 1L (3-state Bus Tranceiver) then  comes out of pin 3 of IC 1L then goes direct to C23 of PC10 ROM cart slot

pin 13 is DBE_, goes direct to pin 5 of IC 2L (74LS139, Dual 2-to-4 line decoder/demultiplexer)
pin 14 is Red, goes direct to Base of transistor Q11
pin 15 is Green, goes direct to Base of transistor Q14
pin 16 is Blue, goes direct to Base of transistor Q17
pin 17 is labelled as "MV GND" and goes direct to PC10's Ground and direct to pin 11 of IC 3E (Op. Amp. LM324's Ground)
pin 18 is CLocK, goes into pin 10 of IC 2G (74S04N, Hex Inverter)
pin 19 is INTerrupt (NMI_) and goes direct to pin 33 (NMI_) of 2A03 CPU, also through 10K ohms and then onto the main rail around the edge of the board, then through 120Ohms to ground. Also pin 19 goes to pin 13 of IC 8G (74LS04N, Hex Inverter)
pin 20 PPU goes directly to Ground (0V)
pin 21 is SYNC_, goes THROUGH C21 0.2uF CAPACITOR and then through 100K resistor, then through 120Ohms to ground. Also goes through this capacitor to the Base of transistor Q8 (C1740)
pin 22 is RST_ (PPU Reset), goes direct to pin 6 of IC 7E (LS 259) and to pin 9 of IC 3G (74LS04, Hex Inverter)
pin 23 is WE_, goes direct to pin 21 of IC 4k (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and to pin 8 of IC 3M (LS244, Bus Transceiver), then out of pin 12 of IC3M to A19 of PC10 ROM cart socket
pin 24 is RD_, goes direct to pin 20 (OE) of IC 4k (VRAM, 6116, 2K x 8 bits CMOS Static RAM), and also via C44 68pF capacitor to ground, and goes (optionally) via SL5 solder enablable link to C45 100pF cap, then to ground

pin 25 is PA13, goes direct to pin 10 of IC 5S (LS368A, Buffer) then out of pin 9 of IC 5S and into B12 of PC10 ROM cart socket labelled as PA13 (inverted) (IC 5S on the schematic is acting as an inverter) and also from PPU pin 25 direct to pin 6 of IC 3M (LS 244, Bus Tranceiver)

pin 26 is PA12, goes direct to pin 13 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 7 of IC 3M then into PA12 i.e. A17 of PC10 ROM cart socket.

pin 27 is PA11, goes direct to pin 4 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 16 of IC 3M then into PA11 i.e. A16 of PC10 ROM cart socket.

pin 28 is PA10, goes direct to pin 15 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 5 of IC 3M then into PA10 i.e. A15 of PC10 ROM cart socket.
 
pin 29 is PA9, goes direct to pin 22 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and goes direct from pin 22 of VRAM to pin 2 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 18 of IC 3M then into PA9 i.e. A14 of PC10 ROM cart socket.

pin 30 is PA8, goes direct to pin 23 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and goes direct from pin 23 of VRAM to pin 17 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded) then out of pin 3 of IC 3M then into PA8 i.e. A13 of PC10 ROM cart socket.

PPU pin 31 is AD7, goes direct to pin 18 of IC 3K (Toshiba TC74HC373AP, Octal i.e. eight D-Type Latches) then out of pin 19 of IC 3K and into A7 i.e. pin 1 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A7 of VRAM direct to pin PA7 i.e. C14 of PC10 ROM cart socket. Also PPU pin 31 goes direct to AD 7 (D7) i.e. pin 17 of VRAM and goes direct from pin 17 of VRAM to PD7 i.e. B13 of PC10 ROM cart socket.

PPU pin 32 is AD6, goes direct to pin 3 of IC 3K (Toshiba TC74HC373AP, Octal i.e. eight D-Type Latches) then out of pin 2 of IC 3K and into A6 i.e. pin 1 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A6 of VRAM direct to pin PA6 i.e. C15 of PC10 ROM cart
socket. Also PPU pin 32 goes direct to AD 6 (D6) i.e. pin 16 of VRAM and goes direct from pin 16 of VRAM to PD6 i.e. B14 of PC10 ROM cart socket.

PPU pin 33 is AD5, goes direct to pin 17 of IC 3K (Toshiba TC74HC373AP, Octal i.e. eight D-Type Latches) then out of pin 16 of IC 3K and into A5 i.e. pin 3 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A5 of VRAM direct to pin PA5 i.e. C16 of PC10 ROM cart
socket. Also PPU pin 33 goes direct to AD 5 i.e. pin 15 of VRAM and goes direct from pin 15 of VRAM to PD5 i.e. B15 of PC10 ROM cart socket.

PPU pin 34 is AD4, goes direct to pin 4 of IC 3K (Toshiba TC74HC373AP, Octal i.e. eight D-Type Latches) then out of pin 5 of IC 3K and into A4 i.e. pin 4 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A4 of VRAM direct to pin PA4 i.e. C17 of PC10 ROM cart
socket. Also PPU pin 34 goes direct to AD 4 i.e. pin 14 of VRAM and goes direct from pin 14 of VRAM to PD4 i.e. B16 of PC10 ROM cart socket.

PPU pin 35 is AD3, goes direct to pin 14 of IC 3K (Toshiba TC74HC373AP, Octal i.e. eight D-Type Latches) then out of pin 15 of IC 3K and into A3 i.e. pin 5 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A3 of VRAM direct to pin PA3 i.e. C18 of PC10 ROM cart
socket. Also PPU pin 35 goes direct to AD 3 i.e. pin 13 of VRAM and goes direct from pin 13 of VRAM to PD3 i.e. B17 of PC10 ROM cart socket.

PPU pin 36 is AD2, goes direct to pin 7 of IC 3K (Toshiba TC74HC373AP, Octal i.e. eight D-Type Latches) then out of pin 6 of IC 3K and into A2 i.e. pin 6 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A2 of VRAM direct to pin PA2 i.e. C19 of PC10 ROM cart
socket. Also PPU pin 36 goes direct to AD 2 i.e. pin 11 of VRAM and goes direct from pin 11 of VRAM to PD2 i.e. B18 of PC10 ROM cart socket.

PPU pin 37 is AD1, goes direct to pin 13 of IC 3K (Toshiba TC74HC373AP, Octal i.e. Eight D-Type Latches) then out of pin 12 of IC 3K and into A1 i.e. pin 7 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A1 of VRAM direct to pin PA1 i.e. C20 of PC10 ROM cart
socket. Also PPU pin 37 goes direct to AD 1 i.e. pin 10 of VRAM and goes direct from pin 10 of VRAM to PD1 i.e. B19 of PC10 ROM cart socket.

PPU pin 38 is AD0, goes direct to pin 8 of IC 3K (Toshiba TC74HC373AP, Octal i.e. Eight D-Type Latches) then out of pin 9 of IC 3K and into A0 i.e. pin 8 of IC 4K (VRAM, 6116, 2K x 8 bits CMOS Static RAM) and from A0 of VRAM direct to pin PA0 i.e. C21 of PC10 ROM cart
socket. Also PPU pin 38 goes direct to AD 0 i.e. pin 9 of VRAM and goes direct from pin 9 of VRAM to PD0 i.e. B20 of PC10 ROM cart socket.

pin 39 is ALE, goes direct to pin 2 of IC 4L (LS367A), and goes (optionally) via SL2 solder enablable link to pin 11 of IC 3K (TC74HC373), then via 120 Ohms to ground (well, 117.3 Ohms as I measured it)
pin 40 is +VCC, +5V in

So the ONLY unaccounted for capacitor (i.e. is on PC10 but is NOT on my revision 4 NES)  is on the Sync line, just before the signal is amplifed. So the question is, does putting a cap somewhere in the sync line remove the vertical short blue lines in Super Mario Bros 2  

Anyone else know how to fix this darned PPU glitch problem?

Drakon, did you get this on your modded NES / Famicoms with RP2C03B in SMB2?

Also here below is a picture showing the path of the Sync line on my NES revision 4, it goes from PPU pin 21, then straight to a transistor, NO caps in that section up to the transistor. So the PC10 uses a cap in the Sync line and the NES doesn't. Maybe because the Composite NES is using Composite Video out of that pin whereas the PC10 uses Composite Sync. Therefore I think I need a cap on this section just before it enters that transistor? Or would it be OK to just add e.g. 220 uF just before Composite Sync enters pin 20 of SCART? As I haven't got a cap there. I hope I don't have to cut the trace leading from pin 21 to that transistor and add a cap in there, I hate the idea of cutting traces. Would be fairly simple to do though I suppose as luckily there are tiny pads on the board there on that line for soldering wires onto.

On my PC10 PCB with the mashed PPU socket;-

CPU is RP2A03E batch 8M3 51
IC 3G is a Texas Instruments SN74LS04N made in Malaysia, batch 913CS, the PC10 schematic says "LS04" (Hex Inverter i.e. six inverters).
IC2K is Toshiba TMM2115BP-15 made in Japan, batch 8833HBK (2K x 8 bits SRAM 150ns/ Work RAM)
IC1K is a Texas Instruments SN74LS245N, batch J836BJ44, the PC10 schematic says "LS245" (Octal i.e. Eight Bus Tranceivers with 3 State Outputs. The 3-State Outputs can drive Bus lines directly. Also called a Bi-directional Eight-Bit Buffer. It is  designed for asynchronous two-way communication between data buses. The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIRection) input, pin 1. The output-enable (OE) input can disable the device so that the buses are effectively isolated). LS244 is the non-inverting version, LS245 here is also a non-inverting version from what I found.

IC8F is a Texas Instruments SN74LS368AN made in Malaysia, batch 921CR, the PC10 schematic says "LS368A" (Hex bus drivers with 3-state outputs", or "Buffer Memory Address Registers", also called "Hex Buffers" and "Line Drivers", or "Drive Bus Lines"), the 368 version is the Inverted outputs version.
IC8E is a Texas Instruments SN74LS368AN made in Malaysia, batch 921CR, the PC10 schematic says "LS368A", see IC 8F which is the same type
IC1L is a Texas Instruments SN74LS244N made in Malaysia, batch 803CS, the PC10 schematic says "LS244" (see IC 1K which is very similar in concept to IC 1L, LS244 is a non-inverting version)
IC2L is a Texas Instruments SN74LS139N made in Malaysia, batch 938XJ, the PC10 schematic says "LS139" (Dual 2-to-4 line decoder/demultiplexer)
Transistor Q11 is an A933, marked "S RY", the PC10 schematic says "A933"
Transistor Q14 is an A933, marked "S RY", the PC10 schematic says "A933"
Transistor Q17 is an A933, marked "S RY", the PC10 schematic says "A933"
IC3E is marked with a logo of 2 "~"'s, one above the other, whichever brand that is, and is an LM324N, batch M8930, the PC10 schematic says "LM324" (Low power, Quad i.e. four Operational Amplifiers)
IC2G is a Texas Instruments SN74S04N made in Malaysia, batch 921XJ, the PC10 schematic says "74S04" (Hex Inverter i.e. six inverters)
IC8G is a Texas Instruments SN74LS04N made in Malaysia, batch 913CS, the PC10 schematic says "LS04" (Hex Inverter i.e. six inverters)
Transistor Q8 is a C1740, marked "QW", the PC10 schematic says "C1740"
IC7E is a Texas Instruments SN74LS259BN, batch J941B5K, the PC10 schematic says "LS259" (8-Bit Addressable Latches, i.e. 8-bit Parallel-Output Storage Register performs Serial-to-Parallel conversion with Storage. Uses include working registers, serial-holding registers, active-high decoders or demultiplexers)
IC4K  is marked with a logo of an "F" with a horizontal line on the top and bottom, I am guessing Fairchild Semiconductor, MB8416A-15-SK made in Japan, batch 8935 KT67, the PC10 schematic says "HM6116ASP-20" (Hitachi 16K (2048 x 8 bits) CMOS Static RAM)
IC5S is a Texas Instruments SN74LS368AN made in Malaysia, batch 921CR, the PC10 schematic says "LS368A" (see IC 8F which is the same type)
IC3M is a Texas Instruments SN74LS244N made in Malaysia, batch 803CS, the PC10 schematic says "LS244" (see IC 1K which is very similar in concept to IC 3M, LS244 is a non-inverting version)
IC3K is a Toshiba TC74HC373AP made in Japan, batch 8945H, the PC10 schematic says "TC74HC373" (i.e Octal i.e. eight D-Type Latches with 3-State Outputs http://pdf1.alldatasheet.com/datasheet-pdf/view/214632/TOSHIBA/TC74HC373AP_07.html
IC4L is a Texas Instruments SN74LS367AN, batch J908C5K, the PC10 schematic says "LS367A" (see IC 8F, which is the same type BUT LS367 is the True outputs version (LS 368 is Inverted outputs) http://pdf1.alldatasheet.com/datasheet-pdf/view/27433/TI/SN74LS367AN.html

NOTES ;-

1) In the above, a line after the label means INVERTED

2) There is an LS245 (sitting between CPU and WRAM) acting as a Bus Tranceiver (Bi-directional Eight-Bit Buffer). The DIR (output control pin) of the LS245 is being controlled by the R/W_ signal (which is inverted, hence the need for the use of one of the six inverters inside IC 3G. The NES does NOT have an LS245, instead on the NES D0 through D7 go direct to WRAM

3) PPU pins 10,11,12 (RS2,1,0) on PC10 go direct to 2A03E CPU pins 6,5,4 (PRG A02, PRG A01, PRG A00) and to Work RAM pins 6,7,8, and to pins 15,2,17 of IC1L (3-state Bus Tranceiver), then through IC1L and out via pins 5,18,3 of 1L and to pins 25, 24, 23 of PC10 ROM cart connector.

NES is similar in that pins 10,11,12 of PPU (RS2,1,0) go direct to pins 6,5,4 of 2A03E CPU (PRG A02, PRG A01, PRG A00) and to pins 6,7,8 of Work RAM, and to pins 11,12,13 of cart slot, **  BUT ** the PC10 puts these 3 pins through IC 1L (3-state Bus Tranceiver), and pins
1 and 19 (Enable A, Enable B) are both connected to ground (there are circles on pins 1 and 19 on the LS244 on the PC10 schematic, maybe this indicates "inverted"?). IC 1L is a Texas Instruments SN74LS244N and is a non-inverting version according to the datasheet.  

4) PPU pin 25 (PA13) on PC10 goes direct to pin 10 of IC 5S (74LS368AN, Hex i.e. Six bus drivers, the 368 version is the Inverted outputs version) then out of pin 9 of IC 5S and into B12 of PC10 ROM cart socket labelled as PA13 (inverted) (i.e. IC 5S on the schematic is acting as an inverter) and also from PPU pin 25 direct to pin 6 of IC 3M (LS 244, Bus Tranceiver with the pin 1 i.e. data flow DIRection control pin grounded, so the bus transceiver is apparently locked into one state out of it's 3 available states of data flow i.e. A to B, or B to A, or isolate B from A) then out of pin 14 of IC 3M then into PA13 i.e. A18 of PC10 ROM cart socket.

Cheers,

Alistair G.

[Drakon]

uhh, what's wrong?  All my games run problem free on my rgb systems except for stuff like felix the cat that uses some sort of special feature that the rgb ppu doesn't do for some reason.

You're getting 1 row of pixels that're an off colour?  ....who cares?  I never noticed that in mario 2 but in some games I get 1 horizontal row of pixels that're just like random colours...but it's just 1 row of pixels so whatever.

I think a good example is the title screen of kick master gives me 1 row of trippy random pixels.  It's just 1 row of pixels, and it's only during the title screen, I don't lose any sleep over this.

You can put all the capacitors you want on the sync line it won't break anything unless maybe you wire it into voltage.  I don't even have the sync go through the nes video amp.  I got sync going just by adding any sized cap between the ppu and my s-video encoder.  No amping was needed....but this is a rgb to s-video encoder not a rgb tv.  I don't have a rgb capable tv I just encode the rgb into s-video or component.

The kit I use has the sync go through a lm1881n and then into a cxa1645.....again there's no amping going on with the sync on these kits it just feeds into the cxa encoder after the lm1881 cleans it up

I've played through mario 2 (mario usa) many times on the rgb system and never noticed anything like what you got.  The game runs on my system just like the composite ppu....but super sharp and with a slightly different/more vibrant pallette.

also for anyone interested I rgb modded a sharp twin famicom today and the video is just as clean as my jailbar free toaster.   FDS games run fine on the rgb twin famicom too.  I even swapped out the chip that makes the powerpak run wtih the rgb mod

[Salamander]

If it turns out these few remaining glitches and the jailbars are related that would be a great thing to fix but as-is probably not so much.  Megaman 2 has some really ugly graphical garbage in the underwater section of the Bubbleman stage that is quite a bit worse than that flickering blue rectangle in SMB2.

My sync line is lifted and bypasses the internal hardware of the NES as well and I still get that blue rectangle among other things so it's got nothing to do with board components after pin 21.

[Drakon]

I mucked around more with my rgb modded twin famicom.  I tried kick master on the rgb av famicom, sorry it isn't an entire horizontal row of pixels that're random it was just a short horizontal row on the right side.  But on my twin I didn't seem to get this row of pixels.  So I guess random rows of funky pixels are just caused by your pcb revision.  It seems different pcb types give different odd rows of pixels from the rgb ppu.  Once again I don't really care because it was literally just 1 row of pixels.  My megaman 2 has the fun waterman stage weirdness.  It like glitches 1 tile for just 1 frame of animation every once in a while.  I doubt there's any fix for this.  I even played some megaman 2 hacks on my powerpak and the underwater stages had the same problem so something about the programming the rgb ppu doesn't like.

Also the twin famicom is very jailbar free when rgb modded.  It's not as clean as the av famicom but it's very very close.  It has just as good quality video as my nes-cpu-06 toaster which is also just a little bit worse than my av famicom in terms of video quality.

Not sure if I mentioned this before but some rgb chips have less jailbars than others.  These chips have no special markings on them and they came from the exact same type of pcbs that my more-jailbar chips came from.  I use a combination of one of these less-jailbar chips and my revision 2 av famicom and on s-video on my tv I get jailbars on nothing at all.

[Live_Steam_Mad]

Makes perfect sense now why the background in stage 2 of Castlevania changes from red to a shade of purple.  Again though, I'd point out you can fix most of the  oversaturation just by adding pots.   In my experience blue is really the main offender and dialing just that line back a little bit can make all the difference.

Hi, as I wanted my NES to have similar RGB adjustment pots as yours I have ordered some Ebay item no. 250840471456, i.e. "2 x 500 OHM Linear Taper Potentiometer Pot B500" from seller tayda2009. Couldn't find any smaller value than 500 Ohms!  The brand is Alpha, I have had some of these type / brand from this seller before when I ordered a 10K dual pot (log = A, I should have fitted 10K linear = B, I have some of those also from same seller, actually I just ordered a 500 Ohm dual linear one from the same seller as I think it will be better suited) for my NES stereo audio mod. They fit the Maplin part that I bought just great ;- http://www.maplin.co.uk/soft-touch-knobs-19412 for the adjustment side of things, and look nice as well. I only got the red one (for the audio mixing) but next I'll grab another red and also blue and green.  The top of the pot is a 6mm splined split shaft BTW and you can fit any standard knob to it.
 I checked the PCB of the PC10 and it also uses 500 Ohm pots on the R,G,B lines.

But instead of altering the pots to change the palette, I will only maybe use the pots to make sure that the output of my RGB NES is suited to the particular display I am using (some have a red bias, etc). If I want the Composite palette with RGB quality, I will get the RC2C05-04 and use the Baku style mod (if it turns out to have the NES palette in it which some say it does).

Cheers,

Alistair G.

[Live_Steam_Mad]

uhh, what's wrong?  All my games run problem free on my rgb systems except for stuff like felix the cat that uses some sort of special feature that the rgb ppu doesn't do for some reason.

You're getting 1 row of pixels that're an off colour?  ....who cares?

Hi Drakon, great to talk to you again, I'm actually getting 2 flashing blue short vertical lines (maybe just over 1/2" long on my 14" TV) in the last column of pixels (on the right) as a problem and I care because it's permanently there on SMB2 (but not on SMB1, and I don't have any other games or Powerpak to test due to personal circumstances restricting my buying power LOL).

> I never noticed that in mario 2

Ahh interesting, and you're using different revision NTSC USA NES's (6,10,11, so far) than mine (4) and you have a cap (220uF I think you said) on your sync line but no sync amp and not going through the NES for Sync, and an RGB to S-Video converter and amp on your S-Video line. So the 2 differences from my set up are the cap on the Sync and the revision of NES. That's my understanding of it anyway. And I see that you can see all lines 0 to 255 of your PPU output on your HDTV. So if there was any glitch in SMB2 you'd have seen it. Funny how you get no glitch and I do.

>but in some games I get 1 horizontal row of pixels that're just like random colours...but it's just 1 row of pixels so whatever.

Is that after the 68 or 120 pF cap fix on your RP2C03B, or before it? I used to get horizontal lines sometimes in SMB1 on my Composite output of this NES (white-black-white line maybe 1.5" long, lasting a tiny fraction of a second, only in certain places and even then very difficult to reproduce, I posted a Youtube video showing it in this topic a while back) and I was seeing horiztontal blue lines in a similar vein on the underground sections of SMB1 before I did the 68pF cap mod to my RP2C03B and now I don't see them anymore ever.

Cheers,

Alistair G.

[Live_Steam_Mad]

If it turns out these few remaining glitches and the jailbars are related that would be a great thing to fix

I don't think they are related at all. EDIT : Whoops I may be wrong, see later.

>  Megaman 2 has some really ugly graphical garbage in the underwater section of the Bubbleman stage that is quite a bit worse than that flickering blue rectangle in SMB2.

Have you already done the 68 / 120 pF cap mod to your NES? BTW I get a short blue line, not rectangle on SMB2.

>My sync line is lifted and bypasses the internal hardware of the NES as well and I still get that blue rectangle among other things so it's got nothing to do with board components after pin 21.

Do you happen to know if you have a cap' anywhere in your Sync line?

Cheers,

ARG

[Live_Steam_Mad]

I mucked around more with my rgb modded twin famicom.  I tried kick master on the rgb av famicom, sorry it isn't an entire horizontal row of pixels that're random it was just a short horizontal row on the right side.  But on my twin I didn't seem to get this row of pixels.  So I guess random rows of funky pixels are just caused by your pcb revision.  It seems different pcb types give different odd rows of pixels from the rgb ppu.  

I think you might very well have a good point there, it does seem to depend on your NES revision.

I say this because I just put a 220uF cap on the amplified Composite Sync just before it hits pin 20 of my SCART plug, my NES is using the RF box for amping the Sync, and with the new cap it did NOT remove these darned glitches. Curses. All it did was make my jail bars suddenly visible when they weren't there before, so that I now needed to turn my TV down more, this time to 50 percent brightness, to make them go away on the black start screen of SMB2.

As well as increasing the jail bars significantly, I also got the 2 vertical short blue lines on the right in the last column of pixels flashing at me a lot more prevalently in SMB2. This sucked LOL. They were still there in the World section 1 as well. No change on SMB1.

Either the strength of the cap might make a difference maybe or maybe I have to add a cap before the sync gets amplified instead, or I am just wasting my time and it's the revision of my NES and I can't get rid of it (which is what I strongly suspect) without altering one or more IC's on my PCB. It may well be that the PC10 is using slightly different IC's to the ones on my PCB (I posted pictures of both a while back on here) and so tomorrow I will go through the PC10 schematic and compare the IC's to the ones on my Rev. 4 NES and report back if anything is different. I don't want to change the Toshiba TC74HC373P (Japan, batch 8643H) as it would make my NES incompatible with the Powerpak according to what I read LOL.

> My megaman 2 has the fun waterman stage weirdness.  It like glitches 1 tile for just 1 frame of animation every once in a while.  I doubt there's any fix for this.  

Ahh so you get the glitch that Salamander gets, or a similar one at least, and that's after the cap was added from pin 20 to 24 of the PPU.

>I even played some megaman 2 hacks on my powerpak and the underwater stages had the same problem so something about the programming the rgb ppu doesn't like.

So there is no revision of NES / Famicom / anything else  that can ever give a totally glitch free RGB mod?! Unless I use a different PPU like the RC2C05-99 (Titler) or RC2C03B that doesn't have these glitches we have with the RP2C03B?

Cheers,

Alistair G.

[Live_Steam_Mad]

Here is a clue to where the problem lies with the PPU glitching... it's strongly related to the sprite vertical position  

I noticed this in SMB2 ... as the blue character in this screen grab goes up and down, SO DOES THE BLUE VERTICAL LINE ON THE RIGHT THAT IS DIRECTLY IN LINE WITH AND AS TALL AS THE CHARACTER.

Also the blue line which is above this one stays fixed in position because it's related to the status of Mario (damage / life force bar must be a sprite!).

So it seems to be related to the particular IC's in the path between PPU and the memory etc., and hence therefore to Drakon's suggestion of the revision of your NES!

I was thinking that, just like the PowerPak has the issue with not liking the 74LS373, the Rp2C03B might take a dislike to some chip(s) we have in our NES that is/are different on the PC10 PCB.

Also, maybe the Jail Bars and glitches are related after all, since the glitches seem to be from sprite PPU working (address lines), and the jail bars are caused by address line interference so I read.

Would anyone with an RC2C03B (Markus) or RC2C05-04 (Baku) or RC2C05-99 (Titler) care to tell us if they have experienced any glitches in any NES games ?  

PS I tried adding the image here but it says something about being full. So Picassa it is.

https://picasaweb.google.com/lh/photo/dXBc6VURwtV01UWUJgVjSJsL1cJbDsUCEqprHCeUogU?feat=directlink

https://picasaweb.google.com/lh/photo/Xe2ALNii8PfLz9AY71mDC5sL1cJbDsUCEqprHCeUogU?feat=directlink

Cheers,

Alistair G.

[Live_Steam_Mad]

BTW there are NES Schematics (but not original Nintendo ones, see page 1 of them) for comparing with the PlayChoice 10 ones linked to earlier, are at ;-

http://www.freeinfosociety.com/electronics/schemview.php?id=2405

Cheers,

ARG

[Salamander]

Probably not a wise thing to do to the one and only RGB NES I have on hand to mess around with but I did decide to tinker yesterday after reading the posts here.  Grounding out the PPU data bus pins one at a time, specifically ALE and AD0 through AD7 leads me to believe this is where the problem may be.  Obviously grounding any of these is going to produce graphical issues but ALE through AD2 in particular were interesting.  It produced black bars a few pixels thick, evenly spaced, at roughly the same positions on the screen as the jailbars.  Could be a good place to start looking?

[Live_Steam_Mad]

I cleaned up the scans (I am grateful for them, thanks goes to Cyberspike for the original scans, but the quality sucked and was very much too low a resolution and they were dark and hard to see with little contrast) as best I could and here they are in a rather more visible form as a PDF ;-

http://www.prescotmes.pwp.blueyonder.co.uk/NES_Schematics_by_Electronix_1992.pdf

Cheers,

ARG

[Salamander]

One thing I notice right off the bat with those schematics is that the LS367A present in the PC10 hardware doesn't exist in the NES.  Instead it's a straight connection between U2 (74LS373/74HC373) and ALE (PPU pin 39).  Quick pdf datasheet search says the missing IC is a buffer/line driver.

[Live_Steam_Mad]

OK so my heatsinks arrived and I fitted them. Gives me peace of mind at least. Each one was an identical size and fits the RP2C03B just great.

There was an item code on the packet that showed it was from Deal Extreme ;-

http://www.dealextreme.com/p/aluminum-alloy-chipset-heatsinks-for-pc-memory-chips-8-hsk-set-15361

The adhesive doesn't look like any thermal compound I am aware of (I know what the grey thermal pads look like on the PS2 for example), instead it looks just like thin servo tape (like from my RC models hobby). I cleaned the chip with Isopropyl Alcohol and I peeled the paper off the adhesive pads and stuck the heatsinks on, I used 3 of them to completely cover the chip (just about).

The adhesive is just like on servo tape (black glossy and extremely tacky, not like on the thermal pads in the PS2) so watch out and don't press them on just place them on until you are happy, otherwise repositioning is almost impossible. When you press them on they stick down very tenaciously and you can lift up the whole PCB by pulling up one heatsink. So I don't think that they will come off in the NES.

I am still a little worried about the heat and it being upside down on the "wrong" side of the board, in an unventilated small plastic box that is the NES, but there's little that I can do about that. I will now run the NES for many hours and check for lockups. No problems so far.

Pictures below to show the heatsinks and how far below the expansion port they come to. I can't tell whether the middle heatsink (the raised one on top of the die) is pressing against the plastic of the NES casing or not as I can't see it. I was hoping that I could see though the expansion port blanking plate but when I removed the big rectanglular lump of plastic off the bottom of the NES where the expansion port was (you just press in the sides and pull and the clips of it come off) there was still a small plate of plastic covering the port that could not be removed without cutting it off! And I can't see beyond it well enough to see the PPU properly. With the 3 heatsinks in place on my RP2C03B the NES PCB does seem to sit properly in the casing and allow the screws to be screwed in properly so I'm fairly happy with it now.

Note in the pictures how I have separated the middle heatsink from the left and right one so as to allow air to circulate fully between them.

http://picasaweb.google.com/LiveSteamMad/RGBNESHeatsinks

Cheers,

Alistair G.

[Salamander]

@Live_Steam_Mad:  The pots I used were 500 ohm linear on the color lines, the mixer is a 10k ohm dual gang linear.   The manufacturer of the pot knobs I used is Re'an in case anyone wants to source those.

There is a 68pf cap in place on pin 24 it makes no difference to the other random glitching including SMB2.

There are no caps in my sync line, it goes through a THS7314 to the AD725 I used as an s-video encoder (oddly enough it will sync correctly with ~1.54 volts rather than 2 it asks for).  Sync straight off the board with no components at all is also enough to run an RGB SCART to component transcoder without issue.

[Drakon]

uhm.  I didn't play mario 2 on a toaster I played it on the av famicom.  My nes-cpu-06 toaster I can throw in a kit and see.  Maybe later when I'm not feeling lazy

You really don't need a heatsink on the rgb ppu.  I had a system running all day long when playing my final fantasy 3 marathon....nothing overheated.

awesome work salamander...  I'm desoldering a ls367A chips from my army of playchoice pcbs and gonna wire it up and see what happens

[Salamander]

@Drakon:  I was going to order some myself to play with but Digikey doesn't have any more through hole in stock and the Ebay options seem silly when I just need one chip.  Taking it straight from the original hardware is a good idea and if you want to test that would be great.  

Couple things do bother me about the way that hand drawn schematic shows the layout.  Only pins 1 through 7 are accounted for on what should be a 16 pin IC, the most important of which I'd think would be VCC (pin 16).  The only ones actually connected according to this are 1 (ground), 2 (connects to PPU pin 39) and 6 (connects to 74HC373 pin 11).

About playing with the bus pins...interference varies somewhat pin to pin, some of them produce a ton of garbage.  If you ground PPU pin 33 or pin 17 of the 74HC373 it's a near perfect overlap with the jailbars on the CV2 title.  Here's what happens if you play around with ALE in SMB1, check out where the JB's are relative to the bands at the bottom.



Edit:  Might be worth just tracing that IC on the arcade hardware.  It looks like the LS367A interacts with the CPU on pins 31 and 32, the RAM on pin 21 as well as R/W and IRQ in the section blocked off and marked as the ROM connector.

[Drakon]

I'm desoldering one right now.  I have 8 playchoice pcbs.  I'm just going to wire this chip to ground and voltage.  And run the ale trace through it the way it's going through it on the playchoice.  Using my probe to find what pins connect it.  I'm ignoring the rest of the chips pins

*edit*

didn't work.  It just makes the graphics go garbled when you wire the chip.  Even garbled on the composite ppu

[Salamander]

Schematic also shows some interaction between pins 9 and 10 of the IC and pin 31 of the CPU as well as 11 through 15 on R/W and IRQ between the ROM connector, the RAM and the CPU.

[Drakon]

can I get the schematic you have?  The one I have doesn't show where all the pins of the chip go

*edit*

Oh nevermind I see what you're talking about.  Sheesh I wish this schematic had the chip pinout all in one place..

tomorrow I'll try wiring cpu pin 31 into pin 10 of the 367 chip.... pin 9 goes to a pin on a rom connector that is a different type of connection from the nes cart socket.  And the other end of pin 9 goes into a bunch of parts I have no idea what they do

on a random note of discovery.  On the original famicom schematic cpu pin 31 goes into a ls139 chip.  The playchoice also has the ls139 chip.  However it looks like the nes, nes 2, and av famicom don't use this chip.....and pin 31 of the cpu goes through a much different circuit (other stuff is really different too).  Uhm...odd

*edit yet again*  My sharp twin famicom also has this mysterious ls139 chip.  But when I throw a rgb chip into the twin famicom I still get very mild jailbars.  So whatever this chip is it has nothing to do with jailbars.

I'm also curious though....if grounding the address lines would work wouldn't the jailbars go away when you ground whichever line is causing them?

[Salamander]

Because grounding produces interference in basically the exact spots it leads me to believe it really is a weak signal path issue.  When you do ground the pins among other things it makes the jailbars as bad as they can possibly be, thicker solid black bars.  Reading about what was done in the NES2 I got to wondering if a buffer/collector style amp might work as a bandaid on this...then discovering that chip actually does function as a buffer...sure seemed like the magic bullet.

Edit:  The last ditch thing I'd try is direct off the board wiring between 74HC373 and the PPU.  At present the data bus pins (ALE, AD0->AD7) have to pass under and between control bus signal pins.  I really don't think the RAM is the culprit and from there it goes right to the cartridge connector.

PPU     74HC373
39              11
38               8
37              13
36               7
35              14
34               4
33              17
32               3
31               18

Edit2:  And I do see what you mean, you'd figure by grounding them out eventually you'd find the one with the issue leaving clear video behind.  It's possible that it's multiple lines or this is in the entirely wrong spot for the issue.

Edit3:  Another possibility that occurred to me is that Nintendo was never able to fully resolve this issue in any revision.    A combination of shortening the signal paths and adding that buffer/collector on the composite line was a cosmetic solution they made as well as could be made with the AV Famicom.  Has anyone ever tried adding in a buffer/collector identical to what is used on the toploader composite mod in the color lines off the PPU?  Even running a color line through the toaster hardware between pin 21 and the video out RCA connector would probably tell if it works or not.

[Drakon]

well I wired up the cpu pin that goes through the 367 chip but that made no difference....oh well.  Whatever causes this problem I doubt it's fixable.  Best solution I found is keep trying rgb ppu chips until you find one that produces less jailbars and throw it into a revision 2 av famicom.

If the interference was caused by traces going under a chip wouldn't that be fixable just by adding wires between the chip and the pcb so the chip doesn't go near the traces?

[Salamander]

Would probably require direct wiring and the interference doesn't annoy me enough to run with that haha.  Had Nintendo not masked the AV Fami's board, you could just examine the traces there and see if that's something they figured out and changed already.

[Live_Steam_Mad]

I found a higher resolution version of the NES Schematics by Electronix ;-

http://www.romhacking.net/docs/564/

...but they were grey so I whitened them for my own clarity and PDF'ed them ;-

http://www.prescotmes.pwp.blueyonder.co.uk/NES_Schematics_by_Electronix_1992_higher_res.pdf

Cheers,

Alistair G.

[Live_Steam_Mad]

Forgot to mention, here are the Famicom Schematics ;-

http://nesdev.parodius.com/bbs/viewtopic.php?t=6950

http://atariusa.com/Famicom_Schematics/

The important ones are "FC Factory CPU Schematic Scan" and "FC PPU Schematic".

Cheers,

Alistair G.

[Salamander]

Looks like DBE and CLK are flipped when comparing the NES and that FC schematic.  Checked my toaster NES with a multimeter and that schematic is wrong...PPU pin 13 connects to U3 pin 5 and PPU pin 18 connects to a 51pf cap up at C45 so the hardware itself is fine.  There are a couple ceramic caps in series 330p (C21) and 30p (C23) between the PPU in the FC schematic and U3 that aren't present in the NES one.  The Playchoice schematic has both of these caps as optional and if memory serves not present.

ALE is a direct connection between the PPU and U2 this time in both.  Interestingly enough the FC has the 68pf cap on PPU pin 24 to ground just like you'd see in the Playchoice.